Searched refs:INTEN (Results 1 - 11 of 11) sorted by relevance

/netbsd-current/sys/dev/eisa/
H A Dahbreg.h71 #define INTEN 0x10 macro
H A Dahb.c693 bus_space_write_1(iot, ioh, INTDEF, (intdef | INTEN)); /* make sure we can interrupt */
/netbsd-current/sys/dev/ic/
H A Daic6360reg.h300 #define INTEN 0x04 macro
H A Daic7xxx_inline.h586 if ((ahc->pause & INTEN) == 0) {
H A Daic6360.c429 bus_space_write_1(sc->sc_iot, sc->sc_ioh, DMACNTRL0, INTEN);
1712 * Clear INTEN. We enable it again before returning. This makes the
2061 bus_space_write_1(iot, ioh, DMACNTRL0, INTEN);
H A Daic79xx_inline.h887 if ((ahd->pause & INTEN) == 0) {
H A Daic7xxx.c4896 hcntrl &= ~INTEN;
4897 ahc->pause &= ~INTEN;
4898 ahc->unpause &= ~INTEN;
4900 hcntrl |= INTEN;
4901 ahc->pause |= INTEN;
4902 ahc->unpause |= INTEN;
H A Daic79xx.c6764 hcntrl &= ~INTEN;
6765 ahd->pause &= ~INTEN;
6766 ahd->unpause &= ~INTEN;
6768 hcntrl |= INTEN;
6769 ahd->pause |= INTEN;
6770 ahd->unpause |= INTEN;
/netbsd-current/sys/dev/pci/
H A Dif_kse.c82 #define INTEN 0x028 /* interrupt enable */ macro
822 CSR_WRITE_4(sc, INTEN, sc->sc_inten);
/netbsd-current/sys/dev/microcode/aic7xxx/
H A Daic7xxx_reg.h1514 #define INTEN 0x02 macro
H A Daic79xx_reg.h2425 #define INTEN 0x02 macro

Completed in 418 milliseconds