Searched refs:GRPH_ARRAY_MODE (Results 1 - 7 of 7) sorted by relevance
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | si_enums.h | 95 #define GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) macro
104 #define GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) macro
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| H A D | amdgpu_dce_v10_0.c | 2003 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE,
2014 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE,
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| H A D | amdgpu_dce_v11_0.c | 2045 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE,
2056 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE,
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| H A D | amdgpu_dce_v6_0.c | 1952 fb_format |= GRPH_ARRAY_MODE(GRPH_ARRAY_2D_TILED_THIN1);
1958 fb_format |= GRPH_ARRAY_MODE(GRPH_ARRAY_1D_TILED_THIN1);
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| H A D | dce_mem_input.h | 139 SFB(blk, GRPH_CONTROL, GRPH_ARRAY_MODE, mask_sh),\
276 type GRPH_ARRAY_MODE;\
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| H A D | amdgpu_dce_mem_input.c | 377 if (dce_mi->masks->GRPH_ARRAY_MODE) { /* GFX8 */
386 GRPH_ARRAY_MODE, info->gfx8.array_mode,
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| H A D | amdgpu_dce110_mem_input_v.c | 199 UNP_GRPH_CONTROL, GRPH_ARRAY_MODE);
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