Searched refs:GICC_CTRL_V1_Enable (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/arch/arm/cortex/
H A Dgic_reg.h72 #define GICC_CTRL_V1_Enable __BIT(0) // GICv1 macro
H A Dgic.c560 gicc_write(sc, GICC_CTRL, GICC_CTRL_V1_Enable); // enable interrupt
687 gicc_write(sc, GICC_CTRL, GICC_CTRL_V1_Enable); // enable CPU interrupts

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