Searched refs:GICC_CTRL (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/arch/arm/cortex/
H A Dgic_reg.h49 #define GICC_CTRL 0x0000 // CPU Interface Control Register macro
H A Dgic.c560 gicc_write(sc, GICC_CTRL, GICC_CTRL_V1_Enable); // enable interrupt
624 gicc_write(sc, GICC_CTRL, 0); /* disable all interrupts */
687 gicc_write(sc, GICC_CTRL, GICC_CTRL_V1_Enable); // enable CPU interrupts

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