Searched refs:GCK_PLL_TEST_CNTL__TST_SRC_SEL_MASK (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_sh_mask.h277 #define GCK_PLL_TEST_CNTL__TST_SRC_SEL_MASK 0x1f macro
H A Dsmu_7_1_1_sh_mask.h275 #define GCK_PLL_TEST_CNTL__TST_SRC_SEL_MASK 0x1f macro
H A Dsmu_7_1_3_sh_mask.h303 #define GCK_PLL_TEST_CNTL__TST_SRC_SEL_MASK 0x1f macro
H A Dsmu_7_1_2_sh_mask.h275 #define GCK_PLL_TEST_CNTL__TST_SRC_SEL_MASK 0x1f macro
H A Dsmu_7_1_0_sh_mask.h273 #define GCK_PLL_TEST_CNTL__TST_SRC_SEL_MASK 0x1f macro
H A Dsmu_7_0_1_sh_mask.h275 #define GCK_PLL_TEST_CNTL__TST_SRC_SEL_MASK 0x1f macro

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