Searched refs:GCK_DFS_BYPASS_CNTL__BYPASSACLK__SHIFT (Results 1 - 7 of 7) sorted by relevance
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
H A D | amdgpu_polaris_baco.c | 71 { CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, GCK_DFS_BYPASS_CNTL__BYPASSACLK_MASK, GCK_DFS_BYPASS_CNTL__BYPASSACLK__SHIFT, 0, 0x1 }, 163 { CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, GCK_DFS_BYPASS_CNTL__BYPASSACLK_MASK, GCK_DFS_BYPASS_CNTL__BYPASSACLK__SHIFT, 0, 0x1 },
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/ |
H A D | smu_7_0_0_sh_mask.h | 92 #define GCK_DFS_BYPASS_CNTL__BYPASSACLK__SHIFT 0x7 macro
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H A D | smu_7_1_1_sh_mask.h | 92 #define GCK_DFS_BYPASS_CNTL__BYPASSACLK__SHIFT 0x7 macro
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H A D | smu_7_1_3_sh_mask.h | 114 #define GCK_DFS_BYPASS_CNTL__BYPASSACLK__SHIFT 0x7 macro
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H A D | smu_7_1_2_sh_mask.h | 92 #define GCK_DFS_BYPASS_CNTL__BYPASSACLK__SHIFT 0x7 macro
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H A D | smu_7_1_0_sh_mask.h | 92 #define GCK_DFS_BYPASS_CNTL__BYPASSACLK__SHIFT 0x7 macro
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H A D | smu_7_0_1_sh_mask.h | 92 #define GCK_DFS_BYPASS_CNTL__BYPASSACLK__SHIFT 0x7 macro
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