/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 730 setIndexedLoadAction(IM, VT, Expand); 731 setIndexedStoreAction(IM, VT, Expand); 732 setIndexedMaskedLoadAction(IM, VT, Expand); 733 setIndexedMaskedStoreAction(IM, VT, Expand); 737 setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, VT, Expand); 740 setOperationAction(ISD::FGETSIGN, VT, Expand); 741 setOperationAction(ISD::CONCAT_VECTORS, VT, Expand); 742 setOperationAction(ISD::FMINNUM, VT, Expand); 743 setOperationAction(ISD::FMAXNUM, VT, Expand); 744 setOperationAction(ISD::FMINNUM_IEEE, VT, Expand); [all...] |
/netbsd-current/external/bsd/ppp/dist/pppd/ |
H A D | pppcrypt.c | 83 Expand(u_char *in, u_char *out) function 96 /* The inverse of Expand 120 Expand(des_key, crypt_key); 133 Expand(clear, des_input); 147 Expand(cipher, des_input);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.cpp | 36 cl::desc("Expand memcpy into load/store pairs in order")); 71 setOperationAction(ISD::BR_JT, MVT::Other, Expand); 72 setOperationAction(ISD::BRIND, MVT::Other, Expand); 73 setOperationAction(ISD::BRCOND, MVT::Other, Expand); 78 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 79 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); 103 setOperationAction(ISD::SDIVREM, VT, Expand); 104 setOperationAction(ISD::UDIVREM, VT, Expand); 105 setOperationAction(ISD::SREM, VT, Expand); 106 setOperationAction(ISD::UREM, VT, Expand); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 123 setLoadExtAction(ISD::EXTLOAD, MVT::i64, VT, Expand); 124 setLoadExtAction(ISD::SEXTLOAD, MVT::i64, VT, Expand); 125 setLoadExtAction(ISD::ZEXTLOAD, MVT::i64, VT, Expand); 135 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); 140 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i32, Expand); 145 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i32, Expand); 149 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Expand); 150 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Expand); 151 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i8, Expand); 152 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i8, Expand); [all...] |
H A D | R600ISelLowering.cpp | 65 setLoadExtAction(ISD::EXTLOAD, MVT::v2i32, MVT::v2i1, Expand); 66 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i32, MVT::v2i1, Expand); 67 setLoadExtAction(ISD::ZEXTLOAD, MVT::v2i32, MVT::v2i1, Expand); 69 setLoadExtAction(ISD::EXTLOAD, MVT::v4i32, MVT::v4i1, Expand); 70 setLoadExtAction(ISD::SEXTLOAD, MVT::v4i32, MVT::v4i1, Expand); 71 setLoadExtAction(ISD::ZEXTLOAD, MVT::v4i32, MVT::v4i1, Expand); 94 setTruncStoreAction(MVT::v2i32, MVT::v2i1, Expand); 95 setTruncStoreAction(MVT::v4i32, MVT::v4i1, Expand); 98 setCondCodeAction(ISD::SETO, MVT::f32, Expand); 99 setCondCodeAction(ISD::SETUO, MVT::f32, Expand); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1438 setOperationAction(Op, MVT::v2i32, Expand); 1442 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i32, Expand); 1443 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i32, Expand); 1444 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i32, Expand); 1446 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i32, VT, Expand); 1447 setLoadExtAction(ISD::ZEXTLOAD, MVT::v2i32, VT, Expand); 1448 setLoadExtAction(ISD::EXTLOAD, MVT::v2i32, VT, Expand); 1450 setTruncStoreAction(VT, MVT::v2i32, Expand); 1451 setTruncStoreAction(MVT::v2i32, VT, Expand); 1470 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.cpp | 54 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 55 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); 56 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i8, Expand); 57 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i16, Expand); 62 setLoadExtAction(N, VT, MVT::i8, Expand); 66 setTruncStoreAction(MVT::i16, MVT::i8, Expand); 88 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand); 89 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand); 90 setOperationAction(ISD::SRL_PARTS, MVT::i16, Expand); 93 setOperationAction(ISD::ROTL, MVT::i16, Expand); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | Mips16ISelLowering.cpp | 130 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand); 131 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, Expand); 132 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand); 133 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); 134 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand); 135 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand); 136 setOperationAction(ISD::ATOMIC_LOAD_OR, MVT::i32, Expand); 137 setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i32, Expand); 138 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Expand); 139 setOperationAction(ISD::ATOMIC_LOAD_MIN, MVT::i32, Expand); [all...] |
H A D | MipsISelLowering.cpp | 321 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand); 322 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand); 325 // Set LoadExtAction for f16 vectors to Expand 329 setLoadExtAction(ISD::EXTLOAD, VT, F16VT, Expand); 332 setTruncStoreAction(MVT::f32, MVT::f16, Expand); 333 setTruncStoreAction(MVT::f64, MVT::f16, Expand); 335 setTruncStoreAction(MVT::f64, MVT::f32, Expand); 344 setOperationAction(ISD::BR_JT, MVT::Other, Expand); 390 setOperationAction(ISD::SDIV, MVT::i32, Expand); 391 setOperationAction(ISD::SREM, MVT::i32, Expand); [all...] |
H A D | MipsSEISelLowering.cpp | 60 cl::desc("Expand double precision loads and " 74 // Expand all truncating stores and extending loads. 77 setTruncStoreAction(VT0, VT1, Expand); 78 setLoadExtAction(ISD::SEXTLOAD, VT0, VT1, Expand); 79 setLoadExtAction(ISD::ZEXTLOAD, VT0, VT1, Expand); 80 setLoadExtAction(ISD::EXTLOAD, VT0, VT1, Expand); 91 // Expand all builtin opcodes. 93 setOperationAction(Opc, VecTys[i], Expand); 230 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); 231 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 68 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); 69 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); 73 setTruncStoreAction(MVT::i16, MVT::i8, Expand); 81 setOperationAction(ISD::ROTL, MVT::i8, Expand); 82 setOperationAction(ISD::ROTR, MVT::i8, Expand); 83 setOperationAction(ISD::ROTL, MVT::i16, Expand); 84 setOperationAction(ISD::ROTR, MVT::i16, Expand); 88 setOperationAction(ISD::BR_JT, MVT::Other, Expand); 91 setOperationAction(ISD::BRCOND, MVT::Other, Expand); 94 setOperationAction(ISD::SELECT, MVT::i8, Expand); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 86 setOperationAction(ISD::BR_JT, MVT::Other, Expand); 87 setOperationAction(ISD::BRCOND, MVT::Other, Expand); 89 setOperationAction(ISD::SELECT, MVT::i32, Expand); 98 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 99 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); 102 setOperationAction(ISD::VAARG, MVT::Other, Expand); 103 setOperationAction(ISD::VACOPY, MVT::Other, Expand); 104 setOperationAction(ISD::VAEND, MVT::Other, Expand); 106 setOperationAction(ISD::SDIV, MVT::i32, Expand); 107 setOperationAction(ISD::UDIV, MVT::i32, Expand); [all...] |
/netbsd-current/external/gpl2/rcs/dist/src/ |
H A D | co.c | 352 int newmode = Expand==BINARY_EXPAND ? OPEN_O_BINARY : 0; 432 Expand = expmode; 433 if (0 < lockflag && Expand == VAL_EXPAND) { 457 Expand < MIN_UNEXPAND 485 if (Expand == BINARY_EXPAND) 493 ! (Expand==VAL_EXPAND || (lockflag<=0 && StrictLocks))
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H A D | rcsclean.c | 196 Expand = expmode; 199 Expand == KEYVAL_EXPAND && 202 Expand = KEYVALLOCK_EXPAND;
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H A D | rcssyn.c | 201 int Expand; variable 328 Expand = KEYVAL_EXPAND; 333 if ((Expand = strn2expmode(cb.string,cb.size)) < 0)
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H A D | rcsmerge.c | 219 if (Expand == BINARY_EXPAND)
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H A D | rcsdiff.c | 363 && Expand == KEYVAL_EXPAND 394 if (Expand == BINARY_EXPAND)
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 97 void Expand(SDNode *Node, SmallVectorImpl<SDValue> &Results); 130 /// Expand bswap of vectors into a shuffle if legal. 279 case TargetLowering::Expand: { 310 case TargetLowering::Expand: { 337 Action = TargetLowering::Expand; 352 if (Action == TargetLowering::Expand && !TLI.isStrictFPEnabled() && 357 == TargetLowering::Expand && 527 case TargetLowering::Expand: 529 Expand(Node, ResultVals); 732 void VectorLegalizer::Expand(SDNod function in class:VectorLegalizer [all...] |
/netbsd-current/external/gpl2/rcs/include/ |
H A D | conf.h | 80 # define FOPEN_R_WORK (Expand==BINARY_EXPAND ? "r" : "rb") 82 # define FOPEN_W_WORK (Expand==BINARY_EXPAND ? "w" : "wb") 83 # define FOPEN_WPLUS_WORK (Expand==BINARY_EXPAND ? "w+" : "w+b")
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
H A D | VEISelLowering.cpp | 104 setTruncStoreAction(VT, MVT::i1, Expand); 110 setLoadExtAction(ISD::EXTLOAD, FPVT, OtherFPVT, Expand); 111 setTruncStoreAction(FPVT, OtherFPVT, Expand); 134 setOperationAction(ISD::VACOPY, MVT::Other, Expand); 135 setOperationAction(ISD::VAEND, MVT::Other, Expand); 143 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 144 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); 150 setOperationAction(ISD::BRCOND, MVT::Other, Expand); 153 setOperationAction(ISD::BR_JT, MVT::Other, Expand); 160 setOperationAction(ISD::UREM, IntVT, Expand); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 176 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); 186 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand); 187 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); 188 setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand); 189 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand); 190 setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand); 191 setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand); 192 setTruncStoreAction(MVT::f64, MVT::f16, Expand); 193 setTruncStoreAction(MVT::f32, MVT::f16, Expand); 196 setTruncStoreAction(MVT::f64, MVT::f32, Expand); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 374 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2f16, Expand); 375 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f16, Expand); 378 setFP16OperationAction(ISD::SETCC, MVT::v2f16, Legal, Expand); 383 setOperationAction(ISD::SELECT_CC, VT, Expand); 384 setOperationAction(ISD::BR_CC, VT, Expand); 393 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); 413 setOperationAction(ISD::ROTL, MVT::i16, Expand); 414 setOperationAction(ISD::ROTR, MVT::i16, Expand); 415 setOperationAction(ISD::ROTL, MVT::i8, Expand); 416 setOperationAction(ISD::ROTR, MVT::i8, Expand); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 322 setOperationAction(ISD::UREM, VT, Expand); 323 setOperationAction(ISD::SREM, VT, Expand); 324 setOperationAction(ISD::SDIVREM, VT, Expand); 325 setOperationAction(ISD::UDIVREM, VT, Expand); 336 setCondCodeAction(ISD::SETO, VT, Expand); 337 setCondCodeAction(ISD::SETOLT, VT, Expand); 338 setCondCodeAction(ISD::SETLT, VT, Expand); 339 setCondCodeAction(ISD::SETOLE, VT, Expand); 340 setCondCodeAction(ISD::SETLE, VT, Expand); 341 setCondCodeAction(ISD::SETULT, VT, Expand); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.cpp | 89 setOperationAction(Opc, MVT::i32, Expand); 117 setOperationAction(ISD::BRCOND, MVT::Other, Expand); 118 setOperationAction(ISD::BR_JT, MVT::Other, Expand); 126 // Expand var-args ops. 128 setOperationAction(ISD::VAEND, MVT::Other, Expand); 129 setOperationAction(ISD::VAARG, MVT::Other, Expand); 130 setOperationAction(ISD::VACOPY, MVT::Other, Expand); 133 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 134 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1501 setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand); 1502 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); 1526 setOperationAction(ISD::VAEND, MVT::Other, Expand); 1527 setOperationAction(ISD::VAARG, MVT::Other, Expand); 1531 setOperationAction(ISD::VACOPY, MVT::Other, Expand); 1533 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 1534 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); 1541 setOperationAction(ISD::BR_JT, MVT::Other, Expand); 1554 setOperationAction(ISD::SADDO, VT, Expand); 1555 setOperationAction(ISD::SSUBO, VT, Expand); [all...] |