Searched refs:ETH_SR (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/arch/arm/at91/
H A Dat91emacreg.h38 #define ETH_SR 0x08U /* 0x08: Status Register */ macro
H A Dat91emac.c514 while (!(EMAC_READ(ETH_SR) & ETH_SR_IDLE))
533 while (!(EMAC_READ(ETH_SR) & ETH_SR_IDLE))
/netbsd-current/sys/dev/cadence/
H A Dcemacreg.h41 #define ETH_SR 0x08U /* 0x08: Status Register */ macro
H A Dif_cemac.c655 while (!(CEMAC_READ(ETH_SR) & ETH_SR_IDLE))
674 while (!(CEMAC_READ(ETH_SR) & ETH_SR_IDLE))

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