Searched refs:ETH_CTL_ISR (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/arch/arm/at91/
H A Dat91emacreg.h87 #define ETH_CTL_ISR 0x040U /* 1 = increment statistics registers */ macro
H A Dat91emac.c480 EMAC_WRITE(ETH_CTL, ETH_CTL_TE | ETH_CTL_RE | ETH_CTL_ISR
717 EMAC_WRITE(ETH_CTL, ETH_CTL_TE | ETH_CTL_RE | ETH_CTL_ISR
/netbsd-current/sys/dev/cadence/
H A Dcemacreg.h129 #define ETH_CTL_ISR 0x040U /* 1 = increment statistics registers */ macro
H A Dif_cemac.c592 CEMAC_WRITE(ETH_CTL, ETH_CTL_TE | ETH_CTL_RE | ETH_CTL_ISR
922 CEMAC_WRITE(ETH_CTL, ETH_CTL_TE | ETH_CTL_RE | ETH_CTL_ISR

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