Searched refs:DPM_TABLE_75__GraphicsLevel_0_MinVddcPhases_MASK (Results 1 - 1 of 1) sorted by relevance
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/ | ||
H A D | smu_7_1_1_sh_mask.h | 1715 #define DPM_TABLE_75__GraphicsLevel_0_MinVddcPhases_MASK 0xffffffff macro |
Completed in 207 milliseconds