Searched refs:DPM_TABLE_260__LinkLevel_0_PcieGenSpeed__SHIFT (Results 1 - 1 of 1) sorted by relevance
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/ | ||
H A D | smu_7_1_1_sh_mask.h | 2330 #define DPM_TABLE_260__LinkLevel_0_PcieGenSpeed__SHIFT 0x18 macro |
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