Searched refs:DEV0_PF0_FLR_RST_CTRL__FLR_TWICE_EN__SHIFT (Results 1 - 5 of 5) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_sh_mask.h3906 #define DEV0_PF0_FLR_RST_CTRL__FLR_TWICE_EN__SHIFT 0x10 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h25608 #define DEV0_PF0_FLR_RST_CTRL__FLR_TWICE_EN__SHIFT macro
[all...]
H A Dnbio_2_3_sh_mask.h20144 #define DEV0_PF0_FLR_RST_CTRL__FLR_TWICE_EN__SHIFT macro
[all...]
H A Dnbio_6_1_sh_mask.h22580 #define DEV0_PF0_FLR_RST_CTRL__FLR_TWICE_EN__SHIFT macro
[all...]
H A Dnbio_7_0_sh_mask.h37285 #define DEV0_PF0_FLR_RST_CTRL__FLR_TWICE_EN__SHIFT macro
[all...]

Completed in 7933 milliseconds