Searched refs:DCN_1_0__SRCID__DPDBG_FIFO_OVERFLOW_INT (Results 1 - 1 of 1) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/ivsrcid/dcn/
H A Dirqsrcs_dcn_1_0.h131 #define DCN_1_0__SRCID__DPDBG_FIFO_OVERFLOW_INT 7 // DP debug FIFO overflow interrupt DPDBG_IHC_FIFO_OVERFLOW_INT DISP_INTERRUPT_STATUS_CONTINUE21 Level / Pulse macro

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