Searched refs:DCN_1_0__SRCID__DC_D3_OTG_GSL_VSYNC_GAP (Results 1 - 1 of 1) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/ivsrcid/dcn/
H A Dirqsrcs_dcn_1_0.h666 #define DCN_1_0__SRCID__DC_D3_OTG_GSL_VSYNC_GAP 0x20 // D3 : gsl_vsync_gap_interrupt_frame_delay OTG3_IHC_GSL_VSYNC_GAP_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE20 Level / Pulse macro

Completed in 86 milliseconds