Searched refs:DCN_1_0__SRCID__DC_D2_OTG_V_UPDATE (Results 1 - 1 of 1) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/ivsrcid/dcn/
H A Dirqsrcs_dcn_1_0.h567 #define DCN_1_0__SRCID__DC_D2_OTG_V_UPDATE 0x19 // D2 : OTG V_update OTG2_IHC_V_UPDATE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE20 Level / Pulse macro

Completed in 179 milliseconds