Searched refs:DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_V_UPDATE (Results 1 - 5 of 5) sorted by relevance
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/ | ||
| H A D | dce_10_0_enum.h | 421 DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_V_UPDATE = 0x1, enumerator in enum:DCIO_DC_GPU_TIMER_READ_SELECT |
| H A D | dce_11_0_enum.h | 1186 DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_V_UPDATE = 0x1, enumerator in enum:DCIO_DC_GPU_TIMER_READ_SELECT |
| H A D | dce_11_2_enum.h | 1593 DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_V_UPDATE = 0x1, enumerator in enum:DCIO_DC_GPU_TIMER_READ_SELECT |
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/ | ||
| H A D | navi10_enum.h | 8536 DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_V_UPDATE = 0x00000001, enumerator in enum:DCIO_DC_GPU_TIMER_READ_SELECT |
| H A D | vega10_enum.h | 12212 DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_V_UPDATE = 0x00000001, enumerator in enum:DCIO_DC_GPU_TIMER_READ_SELECT |
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