Searched refs:CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK (Results 1 - 7 of 7) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_sh_mask.h30 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x000003f0L macro
H A Dsmu_7_0_0_sh_mask.h113 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x7e0 macro
H A Dsmu_7_1_1_sh_mask.h113 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x7e0 macro
H A Dsmu_7_1_3_sh_mask.h137 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x7e0 macro
H A Dsmu_7_1_2_sh_mask.h113 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x7e0 macro
H A Dsmu_7_1_0_sh_mask.h113 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x7e0 macro
H A Dsmu_7_0_1_sh_mask.h113 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x7e0 macro

Completed in 573 milliseconds