Searched refs:CG_SPLL_FUNC_CNTL_4__SPLL_SPARE__SHIFT (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_sh_mask.h162 #define CG_SPLL_FUNC_CNTL_4__SPLL_SPARE__SHIFT 0xa macro
H A Dsmu_7_1_1_sh_mask.h156 #define CG_SPLL_FUNC_CNTL_4__SPLL_SPARE__SHIFT 0x9 macro
H A Dsmu_7_1_3_sh_mask.h180 #define CG_SPLL_FUNC_CNTL_4__SPLL_SPARE__SHIFT 0x9 macro
H A Dsmu_7_1_2_sh_mask.h156 #define CG_SPLL_FUNC_CNTL_4__SPLL_SPARE__SHIFT 0x9 macro
H A Dsmu_7_1_0_sh_mask.h156 #define CG_SPLL_FUNC_CNTL_4__SPLL_SPARE__SHIFT 0x9 macro
H A Dsmu_7_0_1_sh_mask.h156 #define CG_SPLL_FUNC_CNTL_4__SPLL_SPARE__SHIFT 0x9 macro

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