Searched refs:CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_TEST_SEL__SHIFT (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_sh_mask.h154 #define CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_TEST_SEL__SHIFT 0x0 macro
H A Dsmu_7_1_1_sh_mask.h150 #define CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_TEST_SEL__SHIFT 0x0 macro
H A Dsmu_7_1_3_sh_mask.h174 #define CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_TEST_SEL__SHIFT 0x0 macro
H A Dsmu_7_1_2_sh_mask.h150 #define CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_TEST_SEL__SHIFT 0x0 macro
H A Dsmu_7_1_0_sh_mask.h150 #define CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_TEST_SEL__SHIFT 0x0 macro
H A Dsmu_7_0_1_sh_mask.h150 #define CG_SPLL_FUNC_CNTL_4__SPLL_SCLK_TEST_SEL__SHIFT 0x0 macro

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