Searched refs:CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV_MASK (Results 1 - 7 of 7) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_sh_mask.h28 #define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV_MASK 0x03ffffffL macro
H A Dsmu_7_0_0_sh_mask.h149 #define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV_MASK 0x3ffffff macro
H A Dsmu_7_1_1_sh_mask.h145 #define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV_MASK 0x3ffffff macro
H A Dsmu_7_1_3_sh_mask.h169 #define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV_MASK 0x3ffffff macro
H A Dsmu_7_1_2_sh_mask.h145 #define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV_MASK 0x3ffffff macro
H A Dsmu_7_1_0_sh_mask.h145 #define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV_MASK 0x3ffffff macro
H A Dsmu_7_0_1_sh_mask.h145 #define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV_MASK 0x3ffffff macro

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