Searched refs:CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_sh_mask.h3567 #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK 0x10000000 macro
H A Dsmu_7_1_1_sh_mask.h4185 #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK 0x10000000 macro
H A Dsmu_7_1_3_sh_mask.h5211 #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK 0x10000000 macro
H A Dsmu_7_1_2_sh_mask.h5307 #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK 0x10000000 macro
H A Dsmu_7_1_0_sh_mask.h5197 #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK 0x10000000 macro
H A Dsmu_7_0_1_sh_mask.h5007 #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK 0x10000000 macro

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