Searched refs:CG_CLKPIN_CNTL_2__XO_IN_ICORE_CLK_OE__SHIFT (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_sh_mask.h248 #define CG_CLKPIN_CNTL_2__XO_IN_ICORE_CLK_OE__SHIFT 0xf macro
H A Dsmu_7_1_1_sh_mask.h238 #define CG_CLKPIN_CNTL_2__XO_IN_ICORE_CLK_OE__SHIFT 0xf macro
H A Dsmu_7_1_3_sh_mask.h266 #define CG_CLKPIN_CNTL_2__XO_IN_ICORE_CLK_OE__SHIFT 0xf macro
H A Dsmu_7_1_2_sh_mask.h240 #define CG_CLKPIN_CNTL_2__XO_IN_ICORE_CLK_OE__SHIFT 0xf macro
H A Dsmu_7_1_0_sh_mask.h238 #define CG_CLKPIN_CNTL_2__XO_IN_ICORE_CLK_OE__SHIFT 0xf macro
H A Dsmu_7_0_1_sh_mask.h240 #define CG_CLKPIN_CNTL_2__XO_IN_ICORE_CLK_OE__SHIFT 0xf macro

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