Searched refs:CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT (Results 1 - 10 of 10) sorted by relevance
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| H A D | amdgpu_ci_baco.c | 116 { CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN_MASK, CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT, 0, 0x0 },
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| H A D | amdgpu_fiji_baco.c | 99 { CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN_MASK, CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT, 0, 0x0 },
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| H A D | amdgpu_polaris_baco.c | 111 { CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN_MASK, CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT, 0, 0x0 },
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| H A D | amdgpu_tonga_baco.c | 107 { CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN_MASK, CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT, 0, 0x0 },
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/ |
| H A D | smu_7_0_0_sh_mask.h | 242 #define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x3 macro
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| H A D | smu_7_1_1_sh_mask.h | 232 #define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x3 macro
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| H A D | smu_7_1_3_sh_mask.h | 260 #define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x3 macro
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| H A D | smu_7_1_2_sh_mask.h | 234 #define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x3 macro
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| H A D | smu_7_1_0_sh_mask.h | 232 #define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x3 macro
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| H A D | smu_7_0_1_sh_mask.h | 234 #define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x3 macro
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