Searched refs:BIF_POWER_INTR_MASK__PORT0_DSTATE_INTR_MASK__SHIFT (Results 1 - 5 of 5) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_sh_mask.h4061 #define BIF_POWER_INTR_MASK__PORT0_DSTATE_INTR_MASK__SHIFT 0x10 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h25918 #define BIF_POWER_INTR_MASK__PORT0_DSTATE_INTR_MASK__SHIFT macro
[all...]
H A Dnbio_2_3_sh_mask.h20491 #define BIF_POWER_INTR_MASK__PORT0_DSTATE_INTR_MASK__SHIFT macro
[all...]
H A Dnbio_6_1_sh_mask.h22890 #define BIF_POWER_INTR_MASK__PORT0_DSTATE_INTR_MASK__SHIFT macro
[all...]
H A Dnbio_7_0_sh_mask.h37653 #define BIF_POWER_INTR_MASK__PORT0_DSTATE_INTR_MASK__SHIFT macro
[all...]

Completed in 4394 milliseconds