Searched refs:BACO_CNTL__BACO_RST_INTR_MASK__SHIFT (Results 1 - 7 of 7) sorted by relevance
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| H A D | amdgpu_vega10_baco.c | 44 {CMD_READMODIFYWRITE, SOC15_REG_ENTRY(NBIF, 0, mmBACO_CNTL), BACO_CNTL__BACO_RST_INTR_MASK_MASK, BACO_CNTL__BACO_RST_INTR_MASK__SHIFT, 0, 1}
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| H A D | amdgpu_vega12_baco.c | 42 { CMD_READMODIFYWRITE, NBIF_HWID, 0, mmRCC_BACO_CNTL_MISC_BASE_IDX, mmBACO_CNTL, BACO_CNTL__BACO_RST_INTR_MASK_MASK, BACO_CNTL__BACO_RST_INTR_MASK__SHIFT, 0, 1 }
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbif/ |
| H A D | nbif_6_1_sh_mask.h | 2364 #define BACO_CNTL__BACO_RST_INTR_MASK__SHIFT 0x6 macro
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/ |
| H A D | nbio_7_4_sh_mask.h | 20439 #define BACO_CNTL__BACO_RST_INTR_MASK__SHIFT macro
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| H A D | nbio_2_3_sh_mask.h | 1681 #define BACO_CNTL__BACO_RST_INTR_MASK__SHIFT 0x6 macro
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| H A D | nbio_6_1_sh_mask.h | 17583 #define BACO_CNTL__BACO_RST_INTR_MASK__SHIFT macro
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| H A D | nbio_7_0_sh_mask.h | 117859 #define BACO_CNTL__BACO_RST_INTR_MASK__SHIFT macro
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