Searched refs:AR_TXCFG (Results 1 - 12 of 12) sorted by relevance

/netbsd-current/sys/external/isc/atheros_hal/dist/ar5416/
H A Dar5416_beacon.c91 OS_REG_SET_BIT(ah, AR_TXCFG, AR_TXCFG_ATIM_TXPOLICY);
H A Dar5416_reset.c232 OS_REG_CLR_BIT(ah, AR_TXCFG, AR_TXCFG_DBL_BUF_DIS);
495 OS_REG_WRITE(ah, AR_TXCFG,
496 (OS_REG_READ(ah, AR_TXCFG) & ~AR_TXCFG_DMASZ_MASK) | AR_TXCFG_DMASZ_128B);
507 OS_REG_WRITE(ah, AR_TXCFG,
508 (OS_REG_READ(ah, AR_TXCFG) &~ AR_FTRIG) |
/netbsd-current/sys/external/isc/atheros_hal/dist/ar5211/
H A Dar5211_xmit.c48 txcfg = OS_REG_READ(ah, AR_TXCFG);
67 OS_REG_WRITE(ah, AR_TXCFG, (txcfg &~ AR_TXCFG_FTRIG_M) |
H A Dar5211reg.h38 #define AR_TXCFG 0x0030 /* tx DMA size config register */ macro
/netbsd-current/sys/external/isc/atheros_hal/dist/ar5210/
H A Dar5210reg.h44 #define AR_TXCFG 0x0030 /* TX configuration register */ macro
H A Dar5210_reset.c170 OS_REG_WRITE(ah, AR_TXCFG, AR_DMASIZE_128B);
/netbsd-current/sys/external/isc/atheros_hal/dist/ar5212/
H A Dar5212_xmit.c59 txcfg = OS_REG_READ(ah, AR_TXCFG);
69 OS_REG_WRITE(ah, AR_TXCFG,
H A Dar5212reg.h33 #define AR_TXCFG 0x0030 /* MAC tx DMA size config register */ macro
H A Dar5212_reset.c360 OS_REG_CLR_BIT(ah, AR_TXCFG, AR_TXCFG_DBL_BUF_DIS);
/netbsd-current/sys/external/isc/atheros_hal/dist/ar5312/
H A Dar5312_reset.c306 OS_REG_CLR_BIT(ah, AR_TXCFG, AR_TXCFG_DBL_BUF_DIS);
/netbsd-current/sys/dev/ic/
H A Dathn.c1723 reg = AR_READ(sc, AR_TXCFG);
1732 AR_WRITE(sc, AR_TXCFG, reg);
1762 reg = AR_READ(sc, AR_TXCFG);
1771 AR_WRITE(sc, AR_TXCFG, reg);
H A Dathnreg.h35 #define AR_TXCFG 0x0030 macro
308 /* Bits for AR_TXCFG. */

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