Searched refs:write_icu (Results 1 - 5 of 5) sorted by relevance

/netbsd-6-1-5-RELEASE/sys/arch/arm/omap/
H A Domap_intr.h125 #define write_icu(base,offset,value) \ macro
140 write_icu(bases[0], OMAP_INTB_MIR, masks[0] | omap_global_masks[0]);
141 write_icu(bases[1], OMAP_INTB_MIR, masks[1] | omap_global_masks[1]);
142 write_icu(bases[2], OMAP_INTB_MIR, masks[2] | omap_global_masks[2]);
143 write_icu(bases[3], OMAP_INTB_MIR, masks[3] | omap_global_masks[3]);
144 write_icu(bases[4], OMAP_INTB_MIR, masks[4] | omap_global_masks[4]);
H A Domap_intr.c130 write_icu(OMAP_INT_L1_BASE, OMAP_INTL1_GMR, 0);
132 write_icu(OMAP_INT_L2_BASE, OMAP_INTL2_CONTROL, 0);
134 write_icu(OMAP_INT_L2_BASE, OMAP_INTL2_OCP_CFG,
236 write_icu(omap_intr_bank_bases[bank], OMAP_INTB_ITR,
238 write_icu(omap_intr_bank_bases[bank], OMAP_INTB_MIR,
254 write_icu(OMAP_INT_L1_BASE, OMAP_INTL1_CONTROL,
259 write_icu(OMAP_INT_L2_BASE, OMAP_INTL2_CONTROL,
294 write_icu(omap_intr_bank_bases[bank], OMAP_INTB_MIR,
468 write_icu(info->bank_base, OMAP_INTB_ITR, ~info->mask);
/netbsd-6-1-5-RELEASE/sys/arch/arm/xscale/
H A Dpxa2x0_intr.h56 #define write_icu(offset,value) \ macro
73 write_icu(SAIPIC_MR, intr_mask);
H A Dpxa2x0_intr.c122 write_icu(SAIPIC_ICCR, 1);
123 write_icu(SAIPIC_MR, 0);
216 write_icu(SAIPIC_MR,
251 write_icu(SAIPIC_MR, pxa2x0_imask[curcpu()->ci_cpl]);
H A Dpxa2x0_apm.c960 write_icu(INTCTL_ICMR, 0);
1117 write_icu(INTCTL_ICLR, sd.sd_iclr);
1118 write_icu(INTCTL_ICCR, sd.sd_iccr);
1119 write_icu(INTCTL_ICMR, sd.sd_icmr);

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