Searched refs:sarea_priv (Results 1 - 23 of 23) sorted by relevance

/netbsd-6-1-5-RELEASE/sys/external/bsd/drm/dist/shared-core/
H A Dmga_state.c48 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
49 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
72 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
73 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
95 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
96 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
126 drm_mga_sarea_t *sarea_priv local
157 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
201 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
242 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
271 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
352 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
373 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
406 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
425 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
442 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
506 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
596 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
654 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
702 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
802 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
867 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
889 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
1020 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
[all...]
H A Dr128_state.c85 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
86 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
100 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
101 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
126 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
127 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
142 drm_r128_sarea_t *sarea_priv local
161 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
176 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
203 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
226 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
359 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
464 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
573 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
700 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
1247 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
1329 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; local
[all...]
H A Dvia_video.c43 XVMCLOCKPTR(dev_priv->sarea_priv, i)->lock = 0;
56 if (!dev_priv->sarea_priv)
60 lock = (volatile int *)XVMCLOCKPTR(dev_priv->sarea_priv, i);
76 drm_via_sarea_t *sAPriv = dev_priv->sarea_priv;
H A Dmach64_state.c94 drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; local
95 drm_mach64_context_regs_t *regs = &sarea_priv->context_state;
140 drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; local
141 drm_mach64_context_regs_t *regs = &sarea_priv->context_state;
142 unsigned int dirty = sarea_priv->dirty;
159 sarea_priv->dirty &= ~MACH64_UPLOAD_MISC;
164 sarea_priv->dirty &= ~MACH64_UPLOAD_DST_OFF_PITCH;
168 sarea_priv
224 drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; local
364 drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; local
444 drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; local
555 drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; local
778 drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; local
804 drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; local
826 drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; local
861 drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; local
[all...]
H A Dradeon_state.c753 x += dev_priv->sarea_priv->boxes[0].x1;
754 y += dev_priv->sarea_priv->boxes[0].y1;
782 if (dev_priv->sarea_priv->pfCurrentPage == 1) {
858 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; local
860 int nbox = sarea_priv->nbox;
861 struct drm_clip_rect *pbox = sarea_priv->boxes;
870 if (dev_priv->sarea_priv->pfCurrentPage == 1) {
896 dev_priv->sarea_priv->ctx_owner = 0;
972 dev_priv->sarea_priv
1349 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; local
1506 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; local
1609 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; local
2134 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; local
2207 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; local
2230 drm_radeon_sarea_t *sarea_priv; local
2313 drm_radeon_sarea_t *sarea_priv; local
2527 drm_radeon_sarea_t *sarea_priv; local
[all...]
H A Di915_irq.c220 if (dev_priv->sarea_priv)
221 dev_priv->sarea_priv->last_dispatch =
259 if (dev_priv->sarea_priv)
260 dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
307 if (dev_priv->sarea_priv) {
308 dev_priv->sarea_priv->last_dispatch =
314 if (dev_priv->sarea_priv)
315 dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
327 if (dev_priv->sarea_priv)
328 dev_priv->sarea_priv
[all...]
H A Di915_dma.c58 if (dev_priv->sarea_priv)
59 dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
134 if (ring->head == ring->tail && dev_priv->sarea_priv)
135 dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
173 dev_priv->sarea_priv = (drm_i915_sarea_t *)
209 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
442 if (dev_priv->sarea_priv)
443 dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
541 if (!dev_priv->sarea_priv)
547 dev_priv->sarea_priv
611 drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) local
661 drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) local
[all...]
H A Dmga_dma.c79 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
90 sarea_priv->last_wrap = 0;
205 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; local
209 sarea_priv->last_wrap++;
210 DRM_DEBUG(" wrap = %d\n", sarea_priv->last_wrap);
234 dev_priv->sarea_priv->last_dispatch,
339 wrap = dev_priv->sarea_priv->last_wrap;
877 dev_priv->sarea_priv
[all...]
H A Dvia_map.c61 dev_priv->sarea_priv =
H A Di915_mem.c49 drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv; local
63 age = ++sarea_priv->texAge;
64 list = sarea_priv->texList;
H A Dr128_drv.h80 drm_r128_sarea_t *sarea_priv; member in struct:drm_r128_private
444 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \
445 if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) { \
448 sarea_priv->last_dispatch = 0; \
H A Dr128_cce.c508 dev_priv->sarea_priv =
552 dev_priv->sarea_priv->last_frame = 0;
553 R128_WRITE(R128_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame);
555 dev_priv->sarea_priv->last_dispatch = 0;
556 R128_WRITE(R128_LAST_DISPATCH_REG, dev_priv->sarea_priv->last_dispatch);
H A Dvia_drv.h62 drm_via_sarea_t *sarea_priv; member in struct:drm_via_private
H A Dr600_cp.c1806 dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0;
1807 RADEON_WRITE(R600_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame);
1809 dev_priv->sarea_priv->last_dispatch = dev_priv->scratch[1] = 0;
1811 dev_priv->sarea_priv->last_dispatch);
1813 dev_priv->sarea_priv->last_clear = dev_priv->scratch[2] = 0;
1814 RADEON_WRITE(R600_LAST_CLEAR_REG, dev_priv->sarea_priv->last_clear);
1974 dev_priv->sarea_priv =
2307 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; local
2308 int nbox = sarea_priv
[all...]
H A Dradeon_cp.c714 dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0;
715 RADEON_WRITE(RADEON_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame);
717 dev_priv->sarea_priv->last_dispatch = dev_priv->scratch[1] = 0;
719 dev_priv->sarea_priv->last_dispatch);
721 dev_priv->sarea_priv->last_clear = dev_priv->scratch[2] = 0;
722 RADEON_WRITE(RADEON_LAST_CLEAR_REG, dev_priv->sarea_priv->last_clear);
1152 dev_priv->sarea_priv =
H A Dmga_drv.h79 drm_mga_sarea_t *sarea_priv; member in struct:drm_mga_private
376 entry->age.wrap = dev_priv->sarea_priv->last_wrap; \
H A Dsavage_drv.h128 drm_savage_sarea_t *sarea_priv; member in struct:drm_savage_private
H A Dr300_cmdbuf.c869 buf_priv->age = ++dev_priv->sarea_priv->last_dispatch;
1191 RADEON_DISPATCH_AGE(dev_priv->sarea_priv->last_dispatch);
H A Di915_drv.h111 drm_i915_sarea_t *sarea_priv; member in struct:drm_i915_private
H A Dmach64_drv.h76 drm_mach64_sarea_t *sarea_priv; member in struct:drm_mach64_private
H A Dmach64_dma.c1077 dev_priv->sarea_priv = (drm_mach64_sarea_t *)
1204 dev_priv->sarea_priv->frames_queued = 0;
H A Dradeon_drv.h290 drm_radeon_sarea_t *sarea_priv; member in struct:drm_radeon_private
2036 drm_radeon_sarea_t *sarea_priv_ = dev_priv->sarea_priv; \
H A Dsavage_bci.c817 dev_priv->sarea_priv =

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