Searched refs:SET_Z_CLR_NVC (Results 1 - 3 of 3) sorted by relevance
| /netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/m68hc11/ |
| H A D | gencode.c | 68 #define SET_Z_CLR_NVC M6811_Z_BIT,M6811_NVC_BIT,0 macro
440 { "clra", "->a", "clr8", 1, 0x4f, 2, 2, SET_Z_CLR_NVC },
451 { "clrb", "->b", "clr8", 1, 0x5f, 2, 2, SET_Z_CLR_NVC },
463 { "clr", "->(x)", "clr8", 2, 0x6f, 6, 6, SET_Z_CLR_NVC },
475 { "clr", "->()", "clr8", 3, 0x7f, 6, 6, SET_Z_CLR_NVC },
636 { "clr", "->(y)", "clr8", 3, 0x6f, 7, 7, SET_Z_CLR_NVC },
828 { "clr", "->()", "clr8", 3, 0x79, 3, 3, SET_Z_CLR_NVC },
829 { "clr", "->[]", "clr8", 2, 0x69, 2, 2, SET_Z_CLR_NVC },
831 { "clra", "->a", "clr8", 1, 0x87, 1, 1, SET_Z_CLR_NVC },
832 { "clrb", "->b", "clr8", 1, 0xc7, 1, 1, SET_Z_CLR_NVC },
[all...] |
| /netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/opcodes/ |
| H A D | m68hc11-opc.c | 65 #define SET_Z_CLR_NVC M6811_Z_BIT,M6811_NVC_BIT,0 macro
349 { "clr", OP_IND16, 3, 0x7f, 6, 6, SET_Z_CLR_NVC, cpu6811 },
350 { "clr", OP_IX, 2, 0x6f, 6, 6, SET_Z_CLR_NVC, cpu6811 },
351 { "clr", OP_IY | OP_PAGE2, 3, 0x6f, 7, 7, SET_Z_CLR_NVC, cpu6811 },
352 { "clr", OP_IND16, 3, 0x79, 3, 3, SET_Z_CLR_NVC, cpu6812 },
353 { "clr", OP_IDX, 2, 0x69, 2, 2, SET_Z_CLR_NVC, cpu6812 },
354 { "clr", OP_IDX_1, 3, 0x69, 3, 3, SET_Z_CLR_NVC, cpu6812 },
355 { "clr", OP_IDX_2, 4, 0x69, 4, 4, SET_Z_CLR_NVC, cpu6812 },
356 { "clr", OP_D_IDX, 2, 0x69, 5, 5, SET_Z_CLR_NVC, cpu6812 },
357 { "clr", OP_D_IDX_2, 4, 0x69, 5, 5, SET_Z_CLR_NVC, cpu681
[all...] |
| /netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/opcodes/ |
| H A D | m68hc11-opc.c | 65 #define SET_Z_CLR_NVC M6811_Z_BIT,M6811_NVC_BIT,0 macro
349 { "clr", OP_IND16, 3, 0x7f, 6, 6, SET_Z_CLR_NVC, cpu6811 },
350 { "clr", OP_IX, 2, 0x6f, 6, 6, SET_Z_CLR_NVC, cpu6811 },
351 { "clr", OP_IY | OP_PAGE2, 3, 0x6f, 7, 7, SET_Z_CLR_NVC, cpu6811 },
352 { "clr", OP_IND16, 3, 0x79, 3, 3, SET_Z_CLR_NVC, cpu6812 },
353 { "clr", OP_IDX, 2, 0x69, 2, 2, SET_Z_CLR_NVC, cpu6812 },
354 { "clr", OP_IDX_1, 3, 0x69, 3, 3, SET_Z_CLR_NVC, cpu6812 },
355 { "clr", OP_IDX_2, 4, 0x69, 4, 4, SET_Z_CLR_NVC, cpu6812 },
356 { "clr", OP_D_IDX, 2, 0x69, 5, 5, SET_Z_CLR_NVC, cpu6812 },
357 { "clr", OP_D_IDX_2, 4, 0x69, 5, 5, SET_Z_CLR_NVC, cpu681
[all...] |
Completed in 145 milliseconds