Searched refs:OP_REG (Results 1 - 20 of 20) sorted by relevance

/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/opcodes/
H A Dtic80-opc.c523 #define OP_REG(x) OP_LI(x) /* For readability */
614 {"br", OP_REG(0x390), 0xFFFFF000, 0, {REG_0} },
617 {"br.a", OP_REG(0x392), 0xFFFFF000, 0, {REG_0} },
623 {"add", OP_REG(0x3B0), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
629 {"addu", OP_REG(0x3B2), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
635 {"and", OP_REG(0x322), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
638 {"and.tt", OP_REG(0x322), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
644 {"and.ff", OP_REG(0x330), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
650 {"and.ft", OP_REG(0x328), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
656 {"and.tf", OP_REG(
520 #define OP_REG macro
[all...]
H A Darc-opc.c29 enum operand {OP_NONE,OP_REG,OP_SHIMM,OP_LIMM}; enumerator in enum:operand
434 op_type = OP_REG;
573 ls_operand[LS_BASE] = OP_REG;
625 ls_operand[LS_OFFSET] = OP_REG;
719 if (!((ST_SYNTAX(OP_REG,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
720 || ST_SYNTAX(OP_REG,OP_LIMM,OP_NONE)
721 || (ST_SYNTAX(OP_SHIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
726 || (ST_SYNTAX(OP_LIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
727 || ST_SYNTAX(OP_REG,OP_RE
[all...]
H A Di386-dis.c65 static void OP_REG (int, int);
268 #define RMeAX { OP_REG, eAX_reg }
269 #define RMeBX { OP_REG, eBX_reg }
270 #define RMeCX { OP_REG, eCX_reg }
271 #define RMeDX { OP_REG, eDX_reg }
272 #define RMeSP { OP_REG, eSP_reg }
273 #define RMeBP { OP_REG, eBP_reg }
274 #define RMeSI { OP_REG, eSI_reg }
275 #define RMeDI { OP_REG, eDI_reg }
276 #define RMrAX { OP_REG, rAX_re
13392 OP_REG (int code, int sizeflag) function
[all...]
H A Dm68hc11-opc.c90 #define OP_REG M6812_OP_REG macro
459 | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812 },
461 | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812 },
540 | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812 },
546 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
548 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
893 | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812 },
1018 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
1023 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/opcodes/
H A Dtic80-opc.c523 #define OP_REG(x) OP_LI(x) /* For readability */
614 {"br", OP_REG(0x390), 0xFFFFF000, 0, {REG_0} },
617 {"br.a", OP_REG(0x392), 0xFFFFF000, 0, {REG_0} },
623 {"add", OP_REG(0x3B0), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
629 {"addu", OP_REG(0x3B2), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
635 {"and", OP_REG(0x322), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
638 {"and.tt", OP_REG(0x322), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
644 {"and.ff", OP_REG(0x330), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
650 {"and.ft", OP_REG(0x328), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
656 {"and.tf", OP_REG(
520 #define OP_REG macro
[all...]
H A Darc-opc.c29 enum operand {OP_NONE,OP_REG,OP_SHIMM,OP_LIMM}; enumerator in enum:operand
434 op_type = OP_REG;
573 ls_operand[LS_BASE] = OP_REG;
625 ls_operand[LS_OFFSET] = OP_REG;
719 if (!((ST_SYNTAX(OP_REG,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
720 || ST_SYNTAX(OP_REG,OP_LIMM,OP_NONE)
721 || (ST_SYNTAX(OP_SHIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
726 || (ST_SYNTAX(OP_LIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
727 || ST_SYNTAX(OP_REG,OP_RE
[all...]
H A Di386-dis.c65 static void OP_REG (int, int);
269 #define RMeAX { OP_REG, eAX_reg }
270 #define RMeBX { OP_REG, eBX_reg }
271 #define RMeCX { OP_REG, eCX_reg }
272 #define RMeDX { OP_REG, eDX_reg }
273 #define RMeSP { OP_REG, eSP_reg }
274 #define RMeBP { OP_REG, eBP_reg }
275 #define RMeSI { OP_REG, eSI_reg }
276 #define RMeDI { OP_REG, eDI_reg }
277 #define RMrAX { OP_REG, rAX_re
13500 OP_REG (int code, int sizeflag) function
[all...]
H A Dm68hc11-opc.c90 #define OP_REG M6812_OP_REG macro
459 | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812 },
461 | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812 },
540 | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812 },
546 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
548 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
893 | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812 },
1018 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
1023 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/cr16/
H A Dsimops.c89 OP_REG, enumerator in enum:op_types
319 case OP_REG:
391 case OP_REG:
533 trace_input ("addub", OP_CONSTANT4_1, OP_REG, OP_VOID);
545 trace_input ("addub", OP_CONSTANT16, OP_REG, OP_VOID);
558 trace_input ("addub", OP_REG, OP_REG, OP_VOID);
570 trace_input ("adduw", OP_CONSTANT4_1, OP_REG, OP_VOID);
582 trace_input ("adduw", OP_CONSTANT16, OP_REG, OP_VOID);
594 trace_input ("adduw", OP_REG, OP_RE
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/d10v/
H A Dsimops.c22 OP_REG, enumerator in enum:op_types
264 case OP_REG:
395 case OP_REG:
587 trace_input ("abs", OP_REG, OP_VOID, OP_VOID);
642 trace_input ("add", OP_REG, OP_REG, OP_VOID);
655 trace_input ("add", OP_ACCUM, OP_REG, OP_VOID);
716 trace_input ("add3", OP_REG_OUTPUT, OP_REG, OP_CONSTANT16);
815 trace_input ("addi", OP_REG, OP_CONSTANT16, OP_VOID);
826 trace_input ("and", OP_REG, OP_RE
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/h8300/
H A Dsim-main.h64 OP_REG, /* Register direct. */ enumerator in enum:h8_typecodes
H A Dcompile.c564 *val = X (OP_REG, SP);
973 p->type = X (OP_REG, bitfrom (x));
1373 case X (OP_REG, SB): /* Register direct, byte. */
1376 case X (OP_REG, SW): /* Register direct, word. */
1379 case X (OP_REG, SL): /* Register direct, long. */
1598 case X (OP_REG, SB): /* Register direct, byte. */
1601 case X (OP_REG, SW): /* Register direct, word. */
1604 case X (OP_REG, SL): /* Register direct, long. */
2029 code->op3.type = X (OP_REG, SL);
2035 code->dst.type = X (OP_REG, S
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/gas/config/
H A Dtc-msp430.c983 op->mode = OP_REG;
990 op->mode = OP_REG;
997 op->mode = OP_REG;
1004 op->mode = OP_REG;
1020 op->mode = OP_REG;
1037 op->mode = OP_REG;
1067 op->mode = OP_REG;
1074 op->mode = OP_REG;
1081 op->mode = OP_REG;
1088 op->mode = OP_REG;
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/include/opcode/
H A Dmsp430.h30 #define OP_REG 0 macro
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/include/opcode/
H A Dmsp430.h30 #define OP_REG 0 macro
/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/include/elf/
H A Ddwarf.h179 OP_REG = 0x01, enumerator in enum:dwarf_location_atom
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/
H A Ddwarf.h177 OP_REG = 0x01, enumerator in enum:dwarf_location_atom
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/include/elf/
H A Ddwarf.h179 OP_REG = 0x01, enumerator in enum:dwarf_location_atom
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/v850/
H A Dsim-main.h219 OP_REG, enumerator in enum:op_types
H A Dsimops.c88 case OP_REG:
247 case OP_REG:

Completed in 370 milliseconds