| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.h | 65 static unsigned getReturnSaveOffset(bool isPPC64, bool isDarwinABI) { argument
67 return isPPC64 ? 16 : 8;
69 return isPPC64 ? 16 : 4;
74 static unsigned getFramePointerSaveOffset(bool isPPC64, bool isDarwinABI) { argument
81 return isPPC64 ? -8U : -4U;
84 return isPPC64 ? -8U : -4U;
89 static unsigned getLinkageSize(bool isPPC64, bool isDarwinABI) { argument
90 if (isDarwinABI || isPPC64)
91 return 6 * (isPPC64 ? 8 : 4);
99 static unsigned getMinCallArgumentsSize(bool isPPC64, boo argument
116 getMinCallFrameSize(bool isPPC64, bool isDarwinABI) argument
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| H A D | PPCAsmPrinter.cpp | 393 TmpInst.setOpcode(Subtarget.isPPC64() ? PPC::MFCR8 : PPC::MFCR);
410 if (!Subtarget.isPPC64()) // linux/ppc32 - Normal entry label.
442 bool isPPC64 = TD->getPointerSizeInBits() == 64; local
444 if (isPPC64 && !TOC.empty()) {
473 if (Subtarget.isPPC64()) {
503 if (Subtarget.isPPC64() && Directive < PPC::DIR_64)
548 bool isPPC64 = TM.getTargetData()->getPointerSizeInBits() == 64; local
583 if (isPPC64)
596 if (isPPC64)
620 if (isPPC64)
643 bool isPPC64 = TM.getTargetData()->getPointerSizeInBits() == 64; local
[all...] |
| H A D | PPCSubtarget.h | 116 return isPPC64() ? "E-p:64:64-f64:64:64-i64:64:64-f128:64:128-n32:64"
120 /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
122 bool isPPC64() const { return IsPPC64; } function in class:llvm::PPCSubtarget
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| H A D | PPCFrameLowering.cpp | 205 !(Subtarget.isPPC64() && // No 64-bit SVR4 CRsave.
218 unsigned minCallFrameSize = getMinCallFrameSize(Subtarget.isPPC64(),
304 bool isPPC64 = Subtarget.isPPC64(); local
313 int LROffset = PPCFrameLowering::getReturnSaveOffset(isPPC64, isDarwinABI);
323 FPOffset = PPCFrameLowering::getFramePointerSaveOffset(isPPC64, isDarwinABI);
327 if (isPPC64) {
370 if (!isPPC64) {
455 MachineLocation SP(isPPC64 ? PPC::X31 : PPC::R31);
461 MachineLocation FPSrc(isPPC64
567 bool isPPC64 = Subtarget.isPPC64(); local
776 bool isPPC64 = Subtarget.isPPC64(); local
1071 restoreCRs(bool isPPC64, bool CR2Spilled, bool CR3Spilled, bool CR4Spilled, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, unsigned CSIIndex) argument
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| H A D | PPCRegisterInfo.cpp | 65 return ((!DisablePPC32RS && !Subtarget.isPPC64()) ||
66 (!DisablePPC64RS && Subtarget.isPPC64()));
71 : PPCGenRegisterInfo(ST.isPPC64() ? PPC::LR8 : PPC::LR,
72 ST.isPPC64() ? 0 : 1,
73 ST.isPPC64() ? 0 : 1),
103 if (Subtarget.isPPC64())
111 return Subtarget.isPPC64() ? CSR_Darwin64_SaveList :
116 if (!Subtarget.isPPC64())
119 return Subtarget.isPPC64() ? CSR_SVR464_SaveList : CSR_SVR432_SaveList;
125 return Subtarget.isPPC64()
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| H A D | PPCCTRLoops.cpp | 626 bool isPPC64 = Subtarget.isPPC64(); local
630 const TargetRegisterClass *RC = isPPC64 ? G8RC : GPRC;
638 unsigned CopyOp = (isPPC64 && SrcRC == GPRC) ?
647 TII->get(isPPC64 ? PPC::NEG8 : PPC::NEG),
660 TII->get(isPPC64 ? PPC::LIS8 : PPC::LIS),
665 TII->get(isPPC64 ? PPC::ORI8 : PPC::ORI),
669 TII->get(isPPC64 ? PPC::LI8 : PPC::LI),
676 TII->get(isPPC64 ? PPC::MTCTR8 : PPC::MTCTR)).addReg(CountReg,
693 MBB->addLiveIn(isPPC64
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| H A D | PPCInstrInfo.cpp | 217 bool isPPC64 = TM.getSubtargetImpl()->isPPC64(); local
258 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
269 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
307 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
321 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
385 bool isPPC64 = TM.getSubtargetImpl()->isPPC64(); local
393 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) :
394 (isPPC64
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| H A D | PPCISelLowering.cpp | 79 bool isPPC64 = Subtarget->isPPC64(); local
80 setMinStackArgumentAlignment(isPPC64 ? 8:4);
234 if (isPPC64) {
408 if (isPPC64) {
442 if (isPPC64 && Subtarget->isJITCodeModel())
483 if (PPCSubTarget.isPPC64())
968 Base = DAG.getRegister(PPCSubTarget.isPPC64() ? PPC::X0 : PPC::R0,
1017 Base = DAG.getRegister(PPCSubTarget.isPPC64() ? PPC::X0 : PPC::R0,
1080 Base = DAG.getRegister(PPCSubTarget.isPPC64()
1494 bool isPPC64 = (PtrVT == MVT::i64); local
1961 bool isPPC64 = PtrVT == MVT::i64; local
2333 CalculateParameterAndLinkageAreaSize(SelectionDAG &DAG, bool isPPC64, bool isVarArg, unsigned CC, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, unsigned &nAltivecParamsAtEnd) argument
2501 EmitTailCallStoreFPAndRetAddr(SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, SDValue OldRetAddr, SDValue OldFP, int SPDiff, bool isPPC64, bool isDarwinABI, DebugLoc dl) argument
2542 CalculateTailCallArgDest(SelectionDAG &DAG, MachineFunction &MF, bool isPPC64, SDValue Arg, int SPDiff, unsigned ArgOffset, SmallVector<TailCallArgumentInfo, 8>& TailCallArguments) argument
2606 LowerMemOpCallTo(SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, SDValue Arg, SDValue PtrOff, int SPDiff, unsigned ArgOffset, bool isPPC64, bool isTailCall, bool isVector, SmallVector<SDValue, 8> &MemOpChains, SmallVector<TailCallArgumentInfo, 8> &TailCallArguments, DebugLoc dl) argument
2631 PrepareTailCall(SelectionDAG &DAG, SDValue &InFlag, SDValue &Chain, DebugLoc dl, bool isPPC64, int SPDiff, unsigned NumBytes, SDValue LROp, SDValue FPOp, bool isDarwinABI, SmallVector<TailCallArgumentInfo, 8> &TailCallArguments) argument
2665 bool isPPC64 = PPCSubTarget.isPPC64(); local
3228 bool isPPC64 = PtrVT == MVT::i64; local
3703 bool isPPC64 = Subtarget.isPPC64(); local
3729 bool isPPC64 = PPCSubTarget.isPPC64(); local
3753 bool isPPC64 = PPCSubTarget.isPPC64(); local
5970 bool isPPC64 = PPCSubTarget.isPPC64(); local
5997 bool isPPC64 = PtrVT == MVT::i64; local
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| H A D | PPCSubtarget.cpp | 125 if (isPPC64())
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| H A D | PPCISelDAGToDAG.cpp | 629 bool isPPC64 = (PtrVT == MVT::i64); local
645 if (isPPC64) break;
669 if (isPPC64) break;
678 if (isPPC64) break;
1062 bool isPPC64 = (PtrVT == MVT::i64); local
1065 if (!isPPC64)
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCTargetDesc.cpp | 45 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64); local
46 unsigned Flavour = isPPC64 ? 0 : 1;
47 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR;
63 bool isPPC64 = TheTriple.getArch() == Triple::ppc64; local
67 MAI = new PPCMCAsmInfoDarwin(isPPC64);
69 MAI = new PPCLinuxMCAsmInfo(isPPC64);
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