Searched refs:imm (Results 1 - 25 of 46) sorted by relevance

12

/macosx-10.9.5/JavaScriptCore-7537.78.1/assembler/
H A DARMAssembler.cpp54 ARMWord ARMAssembler::getOp2(ARMWord imm) argument
58 if (imm <= 0xff)
59 return Op2Immediate | imm;
61 if ((imm & 0xff000000) == 0) {
62 imm <<= 8;
66 imm = (imm << 24) | (imm >> 8);
70 if ((imm & 0xff000000) == 0) {
71 imm <<
91 genInt(int reg, ARMWord imm, bool positive) argument
200 getImm(ARMWord imm, int tmpReg, bool invert) argument
220 moveImm(ARMWord imm, int dest) argument
240 encodeComplexImm(ARMWord imm, int dest) argument
[all...]
H A DMacroAssembler.h181 void poke(TrustedImmPtr imm, int index = 0) argument
183 storePtr(imm, addressForPoke(index));
212 void branchPtr(RelationalCondition cond, RegisterID op1, TrustedImmPtr imm, Label target) argument
214 branchPtr(cond, op1, imm).linkTo(target, this);
216 void branchPtr(RelationalCondition cond, RegisterID op1, ImmPtr imm, Label target) argument
218 branchPtr(cond, op1, imm).linkTo(target, this);
226 void branch32(RelationalCondition cond, RegisterID op1, TrustedImm32 imm, Label target) argument
228 branch32(cond, op1, imm).linkTo(target, this);
231 void branch32(RelationalCondition cond, RegisterID op1, Imm32 imm, Label target) argument
233 branch32(cond, op1, imm)
279 patchableBranch32(RelationalCondition cond, RegisterID reg, TrustedImm32 imm) argument
344 addPtr(TrustedImm32 imm, RegisterID srcDest) argument
349 addPtr(TrustedImmPtr imm, RegisterID dest) argument
354 addPtr(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
359 addPtr(TrustedImm32 imm, AbsoluteAddress address) argument
369 andPtr(TrustedImm32 imm, RegisterID srcDest) argument
389 orPtr(TrustedImmPtr imm, RegisterID dest) argument
394 orPtr(TrustedImm32 imm, RegisterID dest) argument
404 subPtr(TrustedImm32 imm, RegisterID dest) argument
409 subPtr(TrustedImmPtr imm, RegisterID dest) argument
419 xorPtr(TrustedImm32 imm, RegisterID srcDest) argument
450 move(ImmPtr imm, RegisterID dest) argument
475 storePtr(TrustedImmPtr imm, ImplicitAddress address) argument
480 storePtr(ImmPtr imm, Address address) argument
485 storePtr(TrustedImmPtr imm, void* address) argument
565 branchSubPtr(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
585 addPtr(TrustedImm32 imm, RegisterID srcDest) argument
590 addPtr(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
595 addPtr(TrustedImm32 imm, Address address) argument
605 addPtr(TrustedImmPtr imm, RegisterID dest) argument
610 addPtr(TrustedImm32 imm, AbsoluteAddress address) argument
620 andPtr(TrustedImm32 imm, RegisterID srcDest) argument
635 orPtr(TrustedImm32 imm, RegisterID dest) argument
640 orPtr(TrustedImmPtr imm, RegisterID dest) argument
650 orPtr(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
655 rotateRightPtr(TrustedImm32 imm, RegisterID srcDst) argument
665 subPtr(TrustedImm32 imm, RegisterID dest) argument
670 subPtr(TrustedImmPtr imm, RegisterID dest) argument
685 xorPtr(TrustedImm32 imm, RegisterID srcDest) argument
730 storePtr(TrustedImmPtr imm, ImplicitAddress address) argument
735 storePtr(TrustedImmPtr imm, BaseIndex address) argument
825 branchAddPtr(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
835 branchSubPtr(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
877 shouldBlind(ImmPtr imm) argument
922 rotationBlindConstant(ImmPtr imm) argument
936 shouldBlind(Imm64 imm) argument
990 rotationBlindConstant(Imm64 imm) argument
1004 convertInt32ToDouble(Imm32 imm, FPRegisterID dest) argument
1014 move(ImmPtr imm, RegisterID dest) argument
1022 move(Imm64 imm, RegisterID dest) argument
1030 and64(Imm32 imm, RegisterID dest) argument
1050 storePtr(ImmPtr imm, Address dest) argument
1060 store64(Imm64 imm, Address dest) argument
1075 shouldBlind(Imm32 imm) argument
1136 xorBlindConstant(Imm32 imm) argument
1143 additionBlindedConstant(Imm32 imm) argument
1155 andBlindedConstant(Imm32 imm) argument
1164 orBlindedConstant(Imm32 imm) argument
1179 add32(Imm32 imm, RegisterID dest) argument
1189 addPtr(Imm32 imm, RegisterID dest) argument
1199 and32(Imm32 imm, RegisterID dest) argument
1209 andPtr(Imm32 imm, RegisterID dest) argument
1219 and32(Imm32 imm, RegisterID src, RegisterID dest) argument
1230 move(Imm32 imm, RegisterID dest) argument
1238 or32(Imm32 imm, RegisterID src, RegisterID dest) argument
1249 or32(Imm32 imm, RegisterID dest) argument
1276 store32(Imm32 imm, Address dest) argument
1300 sub32(Imm32 imm, RegisterID dest) argument
1310 subPtr(Imm32 imm, RegisterID dest) argument
1320 xor32(Imm32 imm, RegisterID src, RegisterID dest) argument
1330 xor32(Imm32 imm, RegisterID dest) argument
1358 branchAdd32(ResultCondition cond, RegisterID src, Imm32 imm, RegisterID dest) argument
1376 branchMul32(ResultCondition cond, Imm32 imm, RegisterID src, RegisterID dest) argument
1396 branchSub32(ResultCondition cond, RegisterID src, Imm32 imm, RegisterID dest, RegisterID scratch) argument
1409 trustedImm32ForShift(Imm32 imm) argument
1414 lshift32(Imm32 imm, RegisterID dest) argument
1424 rshift32(Imm32 imm, RegisterID dest) argument
1434 urshift32(Imm32 imm, RegisterID dest) argument
[all...]
H A DX86Assembler.h267 void push_i32(int imm) argument
270 m_formatter.immediate32(imm);
286 void adcl_im(int imm, const void* addr) argument
288 if (CAN_SIGN_EXTEND_8_32(imm)) {
290 m_formatter.immediate8(imm);
293 m_formatter.immediate32(imm);
320 void addl_ir(int imm, RegisterID dst) argument
322 if (CAN_SIGN_EXTEND_8_32(imm)) {
324 m_formatter.immediate8(imm);
327 m_formatter.immediate32(imm);
331 addl_im(int imm, int offset, RegisterID base) argument
353 addq_ir(int imm, RegisterID dst) argument
364 addq_im(int imm, int offset, RegisterID base) argument
375 addl_im(int imm, const void* addr) argument
402 andl_ir(int imm, RegisterID dst) argument
413 andl_im(int imm, int offset, RegisterID base) argument
430 andq_ir(int imm, RegisterID dst) argument
441 andl_im(int imm, const void* addr) argument
495 orl_ir(int imm, RegisterID dst) argument
506 orl_im(int imm, int offset, RegisterID base) argument
523 orq_ir(int imm, RegisterID dst) argument
534 orl_im(int imm, const void* addr) argument
566 subl_ir(int imm, RegisterID dst) argument
577 subl_im(int imm, int offset, RegisterID base) argument
594 subq_ir(int imm, RegisterID dst) argument
605 subl_im(int imm, const void* addr) argument
632 xorl_im(int imm, int offset, RegisterID base) argument
643 xorl_ir(int imm, RegisterID dst) argument
660 xorq_ir(int imm, RegisterID dst) argument
676 rorq_i8r(int imm, RegisterID dst) argument
688 sarl_i8r(int imm, RegisterID dst) argument
703 shrl_i8r(int imm, RegisterID dst) argument
718 shll_i8r(int imm, RegisterID dst) argument
739 sarq_i8r(int imm, RegisterID dst) argument
788 cmpl_ir(int imm, RegisterID dst) argument
799 cmpl_ir_force32(int imm, RegisterID dst) argument
805 cmpl_im(int imm, int offset, RegisterID base) argument
816 cmpb_im(int imm, int offset, RegisterID base) argument
822 cmpb_im(int imm, int offset, RegisterID base, RegisterID index, int scale) argument
829 cmpb_im(int imm, const void* addr) argument
836 cmpl_im(int imm, int offset, RegisterID base, RegisterID index, int scale) argument
847 cmpl_im_force32(int imm, int offset, RegisterID base) argument
869 cmpq_ir(int imm, RegisterID dst) argument
880 cmpq_im(int imm, int offset, RegisterID base) argument
891 cmpq_im(int imm, int offset, RegisterID base, RegisterID index, int scale) argument
907 cmpl_im(int imm, const void* addr) argument
919 cmpw_ir(int imm, RegisterID dst) argument
938 cmpw_im(int imm, int offset, RegisterID base, RegisterID index, int scale) argument
956 testl_i32r(int imm, RegisterID dst) argument
962 testl_i32m(int imm, int offset, RegisterID base) argument
973 testb_im(int imm, int offset, RegisterID base) argument
979 testb_im(int imm, int offset, RegisterID base, RegisterID index, int scale) argument
986 testb_im(int imm, const void* addr) argument
993 testl_i32m(int imm, int offset, RegisterID base, RegisterID index, int scale) argument
1010 testq_i32r(int imm, RegisterID dst) argument
1016 testq_i32m(int imm, int offset, RegisterID base) argument
1022 testq_i32m(int imm, int offset, RegisterID base, RegisterID index, int scale) argument
1035 testb_i8r(int imm, RegisterID dst) argument
1140 movl_i32r(int imm, RegisterID dst) argument
1146 movl_i32m(int imm, int offset, RegisterID base) argument
1152 movl_i32m(int imm, int offset, RegisterID base, RegisterID index, int scale) argument
1159 movb_i8m(int imm, const void* addr) argument
1167 movb_i8m(int imm, int offset, RegisterID base) argument
1174 movb_i8m(int imm, int offset, RegisterID base, RegisterID index, int scale) argument
1255 movq_i32m(int imm, int offset, RegisterID base) argument
1261 movq_i64r(int64_t imm, RegisterID dst) argument
1290 movl_i32m(int imm, const void* addr) argument
1670 psllq_i8r(int imm, XMMRegisterID dst) argument
1677 psrlq_i8r(int imm, XMMRegisterID dst) argument
1887 revertJumpTo_movq_i64r(void* instructionStart, int64_t imm, RegisterID dst) argument
1906 revertJumpTo_cmpl_ir_force32(void* instructionStart, int32_t imm, RegisterID dst) argument
1923 revertJumpTo_cmpl_im_force32(void* instructionStart, int32_t imm, int offset, RegisterID dst) argument
2319 immediate8(int imm) argument
2324 immediate16(int imm) argument
2329 immediate32(int imm) argument
2334 immediate64(int64_t imm) argument
[all...]
H A DMacroAssemblerX86.h57 void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
59 m_assembler.leal_mr(imm.m_value, src, dest);
62 void add32(TrustedImm32 imm, AbsoluteAddress address) argument
64 m_assembler.addl_im(imm.m_value, address.m_ptr);
72 void add64(TrustedImm32 imm, AbsoluteAddress address) argument
74 m_assembler.addl_im(imm.m_value, address.m_ptr);
75 m_assembler.adcl_im(imm.m_value >> 31, reinterpret_cast<const char*>(address.m_ptr) + sizeof(int32_t));
78 void and32(TrustedImm32 imm, AbsoluteAddress address) argument
80 m_assembler.andl_im(imm.m_value, address.m_ptr);
83 void or32(TrustedImm32 imm, AbsoluteAddres argument
93 sub32(TrustedImm32 imm, AbsoluteAddress address) argument
126 store32(TrustedImm32 imm, void* address) argument
136 store8(TrustedImm32 imm, void* address) argument
158 branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest) argument
164 branchSub32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest) argument
[all...]
H A DMacroAssemblerX86_64.h55 void add32(TrustedImm32 imm, AbsoluteAddress address) argument
58 add32(imm, Address(scratchRegister));
61 void and32(TrustedImm32 imm, AbsoluteAddress address) argument
64 and32(imm, Address(scratchRegister));
73 void or32(TrustedImm32 imm, AbsoluteAddress address) argument
76 or32(imm, Address(scratchRegister));
85 void sub32(TrustedImm32 imm, AbsoluteAddress address) argument
88 sub32(imm, Address(scratchRegister));
107 void convertInt32ToDouble(TrustedImm32 imm, FPRegisterID dest) argument
109 move(imm, scratchRegiste
113 store32(TrustedImm32 imm, void* address) argument
119 store8(TrustedImm32 imm, void* address) argument
180 add64(TrustedImm32 imm, RegisterID srcDest) argument
185 add64(TrustedImm64 imm, RegisterID dest) argument
191 add64(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
196 add64(TrustedImm32 imm, Address address) argument
201 add64(TrustedImm32 imm, AbsoluteAddress address) argument
212 and64(TrustedImm32 imm, RegisterID srcDest) argument
227 or64(TrustedImm64 imm, RegisterID dest) argument
233 or64(TrustedImm32 imm, RegisterID dest) argument
250 or64(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
256 rotateRight64(TrustedImm32 imm, RegisterID srcDst) argument
266 sub64(TrustedImm32 imm, RegisterID dest) argument
271 sub64(TrustedImm64 imm, RegisterID dest) argument
287 xor64(TrustedImm32 imm, RegisterID srcDest) argument
346 store64(TrustedImm64 imm, ImplicitAddress address) argument
352 store64(TrustedImm64 imm, BaseIndex address) argument
498 branchAdd64(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
510 branchSub64(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
[all...]
H A DMacroAssemblerX86Common.h120 void add32(TrustedImm32 imm, Address address) argument
122 m_assembler.addl_im(imm.m_value, address.offset, address.base);
125 void add32(TrustedImm32 imm, RegisterID dest) argument
127 m_assembler.addl_ir(imm.m_value, dest);
140 void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
142 m_assembler.leal_mr(imm.m_value, src, dest);
150 void and32(TrustedImm32 imm, RegisterID dest) argument
152 m_assembler.andl_ir(imm.m_value, dest);
165 void and32(TrustedImm32 imm, Address address) argument
167 m_assembler.andl_im(imm
182 and32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
213 lshift32(TrustedImm32 imm, RegisterID dest) argument
218 lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
235 mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
255 or32(TrustedImm32 imm, RegisterID dest) argument
270 or32(TrustedImm32 imm, Address address) argument
287 or32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
318 rshift32(TrustedImm32 imm, RegisterID dest) argument
323 rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
355 urshift32(TrustedImm32 imm, RegisterID dest) argument
360 urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
372 sub32(TrustedImm32 imm, RegisterID dest) argument
377 sub32(TrustedImm32 imm, Address address) argument
397 xor32(TrustedImm32 imm, Address dest) argument
405 xor32(TrustedImm32 imm, RegisterID dest) argument
435 xor32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
574 store32(TrustedImm32 imm, ImplicitAddress address) argument
579 store32(TrustedImm32 imm, BaseIndex address) argument
584 store8(TrustedImm32 imm, Address address) argument
590 store8(TrustedImm32 imm, BaseIndex address) argument
918 lshiftPacked(TrustedImm32 imm, XMMRegisterID reg) argument
924 rshiftPacked(TrustedImm32 imm, XMMRegisterID reg) argument
971 push(TrustedImm32 imm) argument
981 move(TrustedImm32 imm, RegisterID dest) argument
1000 move(TrustedImmPtr imm, RegisterID dest) argument
1005 move(TrustedImm64 imm, RegisterID dest) argument
1032 move(TrustedImmPtr imm, RegisterID dest) argument
1221 branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
1253 branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument
1275 branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) argument
1297 branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
1303 branchSub32(ResultCondition cond, TrustedImm32 imm, Address dest) argument
[all...]
H A DMacroAssemblerARM.h98 void add32(TrustedImm32 imm, Address address) argument
101 add32(imm, ARMRegisters::S1);
105 void add32(TrustedImm32 imm, RegisterID dest) argument
107 m_assembler.adds(dest, dest, m_assembler.getImm(imm.m_value, ARMRegisters::S0));
123 void add32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
125 m_assembler.adds(dest, src, m_assembler.getImm(imm.m_value, ARMRegisters::S0));
138 void and32(TrustedImm32 imm, RegisterID dest) argument
140 ARMWord w = m_assembler.getImm(imm.m_value, ARMRegisters::S0, true);
147 void and32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
149 ARMWord w = m_assembler.getImm(imm
175 lshift32(TrustedImm32 imm, RegisterID dest) argument
180 lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
206 mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
230 or32(TrustedImm32 imm, RegisterID dest) argument
235 or32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
258 rshift32(TrustedImm32 imm, RegisterID dest) argument
263 rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
281 urshift32(TrustedImm32 imm, RegisterID dest) argument
286 urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
296 sub32(TrustedImm32 imm, RegisterID dest) argument
301 sub32(TrustedImm32 imm, Address address) argument
314 sub32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
329 xor32(TrustedImm32 imm, RegisterID dest) argument
337 xor32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
455 store8(TrustedImm32 imm, const void* address) argument
477 store32(TrustedImm32 imm, ImplicitAddress address) argument
483 store32(TrustedImm32 imm, BaseIndex address) argument
495 store32(TrustedImm32 imm, const void* address) argument
518 push(TrustedImm32 imm) argument
524 move(TrustedImm32 imm, RegisterID dest) argument
535 move(TrustedImmPtr imm, RegisterID dest) argument
704 branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
712 branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument
720 branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest) argument
762 branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) argument
782 branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
789 branchSub32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument
817 patchableBranch32(RelationalCondition cond, RegisterID reg, TrustedImm32 imm) argument
893 add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
898 add32(TrustedImm32 imm, AbsoluteAddress address) argument
905 add64(TrustedImm32 imm, AbsoluteAddress address) argument
930 sub32(TrustedImm32 imm, AbsoluteAddress address) argument
[all...]
H A DARMv7Assembler.h758 void adc(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
764 ASSERT(imm.isEncodedImm());
766 m_formatter.twoWordOp5i6Imm4Reg4EncodedImm(OP_ADC_imm, rn, rd, imm);
769 void add(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
775 ASSERT(imm.isValid());
778 ASSERT(!(imm.getUInt16() & 3));
779 if (!(rd & 8) && imm.isUInt10()) {
780 m_formatter.oneWordOp5Reg3Imm8(OP_ADD_SP_imm_T1, rd, static_cast<uint8_t>(imm.getUInt10() >> 2));
782 } else if ((rd == ARMRegisters::sp) && imm.isUInt9()) {
783 m_formatter.oneWordOp9Imm7(OP_ADD_SP_imm_T2, static_cast<uint8_t>(imm
827 add_S(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
867 ARM_and(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
943 cmn(RegisterID rn, ARMThumbImmediate imm) argument
951 cmp(RegisterID rn, ARMThumbImmediate imm) argument
978 eor(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
1027 ldr(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument
1046 ldrCompact(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument
1101 ldrh(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument
1158 ldrb(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument
1260 movT3(RegisterID rd, ARMThumbImmediate imm) argument
1270 revertJumpTo_movT3movtcmpT2(void* instructionStart, RegisterID left, RegisterID right, uintptr_t imm) argument
1283 revertJumpTo_movT3(void* instructionStart, RegisterID rd, ARMThumbImmediate imm) argument
1296 mov(RegisterID rd, ARMThumbImmediate imm) argument
1314 movt(RegisterID rd, ARMThumbImmediate imm) argument
1321 mvn(RegisterID rd, ARMThumbImmediate imm) argument
1350 orr(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
1431 str(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument
1492 strb(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument
1551 strh(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument
1609 sub(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
1639 sub(RegisterID rd, ARMThumbImmediate imm, RegisterID rn) argument
1671 sub_S(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
1696 sub_S(RegisterID rd, ARMThumbImmediate imm, RegisterID rn) argument
1725 tst(RegisterID rn, ARMThumbImmediate imm) argument
1804 vldr(FPDoubleRegisterID rd, RegisterID rn, int32_t imm) argument
1809 flds(FPSingleRegisterID rd, RegisterID rn, int32_t imm) argument
1856 vstr(FPDoubleRegisterID rd, RegisterID rn, int32_t imm) argument
1861 fsts(FPSingleRegisterID rd, RegisterID rn, int32_t imm) argument
2408 setUInt7ForLoad(void* code, ARMThumbImmediate imm) argument
2640 twoWordOp5i6Imm4Reg4EncodedImmFirst(uint16_t op, ARMThumbImmediate imm) argument
2651 twoWordOp5i6Imm4Reg4EncodedImmSecond(uint16_t rd, ARMThumbImmediate imm) argument
2664 oneWordOp5Reg3Imm8(OpcodeID op, RegisterID rd, uint8_t imm) argument
2669 oneWordOp5Imm5Reg3Reg3(OpcodeID op, uint8_t imm, RegisterID reg1, RegisterID reg2) argument
2679 oneWordOp8Imm8(OpcodeID op, uint8_t imm) argument
2689 oneWordOp9Imm7(OpcodeID op, uint8_t imm) argument
2717 twoWordOp5i6Imm4Reg4EncodedImm(OpcodeID1 op, int imm4, RegisterID rd, ARMThumbImmediate imm) argument
2726 twoWordOp12Reg4Reg4Imm12(OpcodeID1 op, RegisterID reg1, RegisterID reg2, uint16_t imm) argument
2752 vfpMemOp(OpcodeID1 op1, OpcodeID2 op2, bool size, RegisterID rn, VFPOperand rd, int32_t imm) argument
[all...]
H A DMacroAssemblerARMv7.h159 void add32(TrustedImm32 imm, RegisterID dest) argument
161 add32(imm, dest, dest);
170 void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
172 ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
176 move(imm, dataTempRegister);
181 void add32(TrustedImm32 imm, Address address) argument
185 ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
191 move(imm, addressTempRegister);
204 void add32(TrustedImm32 imm, AbsoluteAddress address) argument
208 ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm
221 add64(TrustedImm32 imm, AbsoluteAddress address) argument
246 and32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
262 and32(TrustedImm32 imm, RegisterID dest) argument
288 lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
298 lshift32(TrustedImm32 imm, RegisterID dest) argument
308 mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
332 or32(TrustedImm32 imm, RegisterID dest) argument
342 or32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
363 rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
373 rshift32(TrustedImm32 imm, RegisterID dest) argument
388 urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
398 urshift32(TrustedImm32 imm, RegisterID dest) argument
408 sub32(TrustedImm32 imm, RegisterID dest) argument
419 sub32(TrustedImm32 imm, Address address) argument
442 sub32(TrustedImm32 imm, AbsoluteAddress address) argument
464 xor32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
485 xor32(TrustedImm32 imm, RegisterID dest) argument
718 store32(TrustedImm32 imm, ImplicitAddress address) argument
724 store32(TrustedImm32 imm, BaseIndex address) argument
736 store32(TrustedImm32 imm, const void* address) argument
753 store8(TrustedImm32 imm, void* address) argument
1170 push(TrustedImm32 imm) argument
1180 move(TrustedImm32 imm, RegisterID dest) argument
1203 move(TrustedImmPtr imm, RegisterID dest) argument
1268 int32_t imm = right.m_value; local
1286 int32_t imm = mask.m_value; local
1459 branchAdd32(ResultCondition cond, RegisterID op1, TrustedImm32 imm, RegisterID dest) argument
1482 branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
1487 branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest) argument
1530 branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) argument
1555 branchSub32(ResultCondition cond, RegisterID op1, TrustedImm32 imm, RegisterID dest) argument
1572 branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
1675 moveWithPatch(TrustedImm32 imm, RegisterID dst) argument
1682 moveWithPatch(TrustedImmPtr imm, RegisterID dst) argument
1718 patchableBranch32(RelationalCondition cond, RegisterID reg, TrustedImm32 imm) argument
1827 ARMThumbImmediate imm = ARMThumbImmediate::makeUInt12OrEncodedImm(address.offset); local
1874 moveFixedWidthEncoding(TrustedImm32 imm, RegisterID dst) argument
[all...]
H A DMacroAssemblerSH4.h111 void add32(TrustedImm32 imm, RegisterID dest) argument
113 if (!imm.m_value)
116 if (m_assembler.isImmediate(imm.m_value)) {
117 m_assembler.addlImm8r(imm.m_value, dest);
122 m_assembler.loadConstant(imm.m_value, scr);
127 void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
131 add32(imm, dest);
134 void add32(TrustedImm32 imm, Address address) argument
136 if (!imm.m_value)
141 add32(imm, sc
167 and32(TrustedImm32 imm, RegisterID dest) argument
180 and32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
200 lshift32(TrustedImm32 imm, RegisterID dest) argument
231 mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
246 or32(TrustedImm32 imm, RegisterID dest) argument
271 or32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
282 xor32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
303 rshift32(TrustedImm32 imm, RegisterID dest) argument
320 rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
332 sub32(TrustedImm32 imm, AbsoluteAddress address) argument
355 add32(TrustedImm32 imm, AbsoluteAddress address) argument
378 add64(TrustedImm32 imm, AbsoluteAddress address) argument
406 sub32(TrustedImm32 imm, RegisterID dest) argument
435 xor32(TrustedImm32 imm, RegisterID srcDest) argument
453 compare32(int imm, RegisterID dst, RelationalCondition cond) argument
490 testImm(int imm, int offset, RegisterID base) argument
513 testlImm(int imm, RegisterID dst) argument
552 compare32(int imm, int offset, RegisterID base, RelationalCondition cond) argument
861 store32(TrustedImm32 imm, ImplicitAddress address) argument
881 store32(TrustedImm32 imm, void* address) argument
1469 push(TrustedImm32 imm) argument
1479 move(TrustedImm32 imm, RegisterID dest) argument
1498 move(TrustedImmPtr imm, RegisterID dest) argument
1774 branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
1782 branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument
1814 branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest) argument
1881 branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) argument
1916 branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
1924 branchSub32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument
1990 urshift32(TrustedImm32 imm, RegisterID dest) argument
[all...]
H A DMacroAssemblerMIPS.h123 void add32(TrustedImm32 imm, RegisterID dest) argument
125 add32(imm, dest, dest);
128 void add32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
130 if (imm.m_value >= -32768 && imm.m_value <= 32767
133 addiu dest, src, imm
135 m_assembler.addiu(dest, src, imm.m_value);
138 li immTemp, imm
141 move(imm, immTempRegister);
146 void add32(RegisterID src, TrustedImm32 imm, RegisterI argument
151 add32(TrustedImm32 imm, Address address) argument
232 add32(TrustedImm32 imm, AbsoluteAddress address) argument
252 add64(TrustedImm32 imm, AbsoluteAddress address) argument
287 and32(TrustedImm32 imm, RegisterID dest) argument
303 and32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
325 lshift32(TrustedImm32 imm, RegisterID dest) argument
331 lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
347 mul32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
378 or32(TrustedImm32 imm, RegisterID dest) argument
397 or32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
432 rshift32(TrustedImm32 imm, RegisterID dest) argument
437 rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
452 urshift32(TrustedImm32 imm, RegisterID dest) argument
457 urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
472 sub32(TrustedImm32 imm, RegisterID dest) argument
490 sub32(RegisterID src, TrustedImm32 imm, RegisterID dest) argument
508 sub32(TrustedImm32 imm, Address address) argument
556 sub32(TrustedImm32 imm, AbsoluteAddress address) argument
587 xor32(TrustedImm32 imm, RegisterID dest) argument
602 xor32(TrustedImm32 imm, RegisterID src, RegisterID dest) argument
979 store8(TrustedImm32 imm, void* address) argument
1069 store32(TrustedImm32 imm, ImplicitAddress address) argument
1096 store32(TrustedImm32 imm, BaseIndex address) argument
1144 store32(TrustedImm32 imm, const void* address) argument
1217 push(TrustedImm32 imm) argument
1227 move(TrustedImm32 imm, RegisterID dest) argument
1244 move(TrustedImmPtr imm, RegisterID dest) argument
1617 branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
1623 branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument
1630 branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest) argument
1785 branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest) argument
1838 branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest) argument
1844 branchSub32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest) argument
2049 moveWithPatch(TrustedImm32 imm, RegisterID dest) argument
[all...]
H A DMIPSAssembler.h212 void li(RegisterID dest, int imm) argument
214 if (imm >= -32768 && imm <= 32767)
215 addiu(dest, MIPSRegisters::zero, imm);
216 else if (imm >= 0 && imm < 65536)
217 ori(dest, MIPSRegisters::zero, imm);
219 lui(dest, imm >> 16);
220 if (imm & 0xffff)
221 ori(dest, dest, imm);
225 lui(RegisterID rt, int imm) argument
230 addiu(RegisterID rt, RegisterID rs, int imm) argument
280 andi(RegisterID rt, RegisterID rs, int imm) argument
295 ori(RegisterID rt, RegisterID rs, int imm) argument
305 xori(RegisterID rt, RegisterID rs, int imm) argument
320 sltiu(RegisterID rt, RegisterID rs, int imm) argument
433 bgez(RegisterID rs, int imm) argument
438 bltz(RegisterID rs, int imm) argument
443 beq(RegisterID rs, RegisterID rt, int imm) argument
448 bne(RegisterID rs, RegisterID rt, int imm) argument
899 revertJumpToMove(void* instructionStart, RegisterID rt, int imm) argument
[all...]
H A DARMAssembler.h485 void ldrImmediate(int rd, ARMWord imm, Condition cc = AL) argument
487 m_buffer.putIntWithConstantInt(toARMWord(cc) | LoadUint32 | DataTransferUp | RN(ARMRegisters::pc) | RD(rd), imm, true); local
490 void ldrUniqueImmediate(int rd, ARMWord imm, Condition cc = AL) argument
492 m_buffer.putIntWithConstantInt(toARMWord(cc) | LoadUint32 | DataTransferUp | RN(ARMRegisters::pc) | RD(rd), imm); local
789 // Must be an ldr ..., [pc +/- imm]
800 // Must be an ldr ..., [pc +/- imm]
948 static void revertBranchPtrWithPatch(void* instructionStart, RegisterID rn, ARMWord imm) argument
954 *getLdrImmAddress(instruction) = imm;
980 static ARMWord getOp2(ARMWord imm);
982 // Fast case if imm i
983 getOp2Byte(ARMWord imm) argument
989 getOp2Half(ARMWord imm) argument
996 getImm16Op2(ARMWord imm) argument
[all...]
/macosx-10.9.5/cxxfilt-11/cxxfilt/opcodes/
H A Dsh64-dis.c186 long imm = 0; local
312 imm = temp & 0x3f;
313 if (imm & (unsigned long) 0x20)
314 imm |= ~(unsigned long) 0x3f;
315 fprintf_fn (stream, "%ld", imm);
320 imm = temp & 0x3f;
321 if (imm & (unsigned long) 0x20)
322 imm |= ~(unsigned long) 0x3f;
323 fprintf_fn (stream, "%ld", imm * 32);
344 imm
[all...]
H A Dsh-dis.c498 int imm = 0; local
527 imm = (nibs[2] << 4) | (nibs[3]);
528 if (imm & 0x80)
529 imm |= ~0xff;
530 imm = ((char) imm) * 2 + 4;
533 imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]);
534 if (imm & 0x800)
535 imm |= ~0xfff;
536 imm
[all...]
H A Dh8500-dis.c99 int imm = 0; local
169 imm = (buffer[byte] << 8) | (buffer[byte + 1]);
172 imm = (buffer[byte]) & 0xf;
176 imm = (buffer[byte]);
275 func (stream, "#0x%0x:16", imm & 0xffff);
285 if (imm & (1 << i))
297 func (stream, "#0x%0x:8", imm & 0xff);
311 func (stream, "#%d:4", imm);
H A Dor32-opc.c852 extend_imm (unsigned long imm, char l) argument
861 imm &= mask;
864 if (letter_signed(l) && (imm >> (letter_bits - 1)))
865 imm |= (~mask);
867 return imm;
962 int imm = or32_extract (param_ch, encoding, insn); local
964 imm = extend_imm (imm, param_ch);
968 if (imm < 0)
969 sprintf (disassembled, "%s%d", disassembled, imm);
[all...]
H A Dsparc-dis.c668 int imm; local
671 imm = X_SIMM (insn, 13);
673 imm = X_SIMM (insn, 11);
675 imm = X_SIMM (insn, 10);
687 if (imm <= 9)
688 (*info->fprintf_func) (stream, "%d", imm);
690 (*info->fprintf_func) (stream, "%#x", imm);
697 int imm = X_IMM (insn, *s == 'X' ? 5 : 6); local
699 if (imm <= 9)
700 (info->fprintf_func) (stream, "%d", imm);
[all...]
H A Darm-dis.c1739 int imm;
1741 imm = (given & 0xf) | ((given & 0xe0) >> 1);
1743 /* Is ``imm'' a negative number? */
1744 if (imm & 0x40)
1745 imm |= (-1 << 7);
1747 func (stream, "%d", imm);
2942 int imm;
2944 imm = (given & 0xf) | ((given & 0xfff00) >> 4);
2945 func (stream, "%d", imm);
3136 long imm
1738 int imm; local
2941 int imm; local
3135 long imm = (given & 0x07c0) >> 6; local
3325 unsigned int bits = 0, imm, imm8, mod; local
3348 unsigned int imm = 0; local
3359 unsigned int imm = 0; local
3371 unsigned int imm = 0; local
[all...]
H A Dor32-dis.c221 int imm = or32_extract(param_ch, encoding, insn); local
224 (*info->fprintf_func) (info->stream, "0x%x", imm); local
225 /* (*info->fprintf_func) (info->stream, "%d", imm); */
227 (*info->fprintf_func) (info->stream, "0x%x", imm); local
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MBlaze/
H A DMBlazeISelDAGToDAG.cpp119 /// can be more efficiently represented with [r+imm].
127 int32_t imm = 0;
129 if (isIntS32Immediate(N.getOperand(1), imm))
145 /// a signed 32-bit displacement [r+imm], and if it is not better
154 int32_t imm = 0; local
155 if (isIntS32Immediate(N.getOperand(1), imm)) {
156 Disp = CurDAG->getTargetConstant(imm, MVT::i32);
209 SDValue imm = CurDAG->getTargetConstant(0, MVT::i32); local
215 return CurDAG->SelectNodeTo(Node, Opc, VT, TFI, imm);
216 return CurDAG->getMachineNode(Opc, dl, VT, TFI, imm);
[all...]
/macosx-10.9.5/JavaScriptCore-7537.78.1/disassembler/udis86/
H A Dudis86_syn-att.c93 int64_t imm = 0; local
98 case 8: imm = op->lval.sbyte; break;
99 case 16: imm = op->lval.sword; break;
100 case 32: imm = op->lval.sdword; break;
101 case 64: imm = op->lval.sqword; break;
111 mkasm( u, "$0x" FMT64 "x", imm & sext_mask );
H A Dudis86_syn-intel.c116 int64_t imm = 0; local
123 case 8: imm = op->lval.sbyte; break;
124 case 16: imm = op->lval.sword; break;
125 case 32: imm = op->lval.sdword; break;
126 case 64: imm = op->lval.sqword; break;
136 mkasm( u, "0x" FMT64 "x", imm & sext_mask );
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1122 uint32_t imm = Val & 0xFF; local
1124 uint32_t rot_imm = (imm >> rot) | (imm << ((32-rot) & 0x1F));
1135 unsigned imm = fieldFromInstruction(Val, 7, 5); local
1157 if (Shift == ARM_AM::ror && imm == 0)
1160 unsigned Op = Shift | (imm << 3);
1300 unsigned imm = fieldFromInstruction(Insn, 0, 8); local
1382 imm = ARM_AM::getAM5Opc(U ? ARM_AM::add : ARM_AM::sub, imm);
1383 Inst.addOperand(MCOperand::CreateImm(imm));
1445 unsigned imm = fieldFromInstruction(Insn, 0, 12); local
1528 unsigned imm = ARM_AM::getAM2Opc(Op, amt, Opc, idx_mode); local
1550 unsigned imm = fieldFromInstruction(Val, 7, 5); local
1595 unsigned imm = fieldFromInstruction(Insn, 8, 4); local
1977 unsigned imm = 0; local
2002 unsigned imm = 0; local
2055 unsigned imm = fieldFromInstruction(Val, 0, 12); local
2076 unsigned imm = fieldFromInstruction(Val, 0, 8); local
2127 unsigned imm = fieldFromInstruction(Insn, 0, 24) << 2; local
2901 unsigned imm = fieldFromInstruction(Insn, 0, 4); local
3024 unsigned imm = fieldFromInstruction(Insn, 0, 8); local
3087 unsigned imm = fieldFromInstruction(Val, 3, 5); local
3098 unsigned imm = Val << 2; local
3120 unsigned imm = fieldFromInstruction(Val, 0, 2); local
3170 int imm = fieldFromInstruction(Insn, 0, 12); local
3191 int imm = Val & 0xFF; local
3205 unsigned imm = fieldFromInstruction(Val, 0, 9); local
3220 unsigned imm = fieldFromInstruction(Val, 0, 8); local
3232 int imm = Val & 0xFF; local
3248 unsigned imm = fieldFromInstruction(Val, 0, 9); local
3309 unsigned imm = fieldFromInstruction(Val, 0, 12); local
3321 unsigned imm = fieldFromInstruction(Insn, 0, 7); local
3450 unsigned imm = fieldFromInstruction(Insn, 0, 4); local
3476 unsigned imm = fieldFromInstruction(Val, 0, 8); local
3495 unsigned imm = (unrot >> rot) | (unrot << ((32-rot)&31)); local
3606 unsigned imm = fieldFromInstruction(Insn, 0, 12); local
3631 unsigned imm = fieldFromInstruction(Insn, 0, 12); local
3659 unsigned imm = fieldFromInstruction(Insn, 0, 12); local
3684 unsigned imm = fieldFromInstruction(Insn, 0, 12); local
4458 unsigned imm = fieldFromInstruction(Insn, 16, 6); local
4486 unsigned imm = fieldFromInstruction(Insn, 16, 6); local
[all...]
/macosx-10.9.5/cctools-845/as/
H A Darm.c342 signed int imm; member in struct:arm_it::__anon6852
346 unsigned immisreg : 1; /* .imm field is a second register. */
2970 inst.operands[i].imm = exp.X_add_number & 0xffffffff;
2987 generic_bignum[0]. Make sure we put 32 bits in imm and
2990 inst.operands[i].imm = 0;
2992 inst.operands[i].imm |= generic_bignum[idx]
3103 is_quarter_float (unsigned imm)
3105 int bs = (imm & 0x20000000) ? 0x3e000000 : 0x40000000;
3106 return (imm & 0x7ffff) == 0 && ((imm
3101 is_quarter_float(unsigned imm) argument
6058 bfd_vma imm; local
7140 int imm = inst.operands[2].imm; local
8758 bfd_vma imm; local
10906 neon_bits_same_in_bytes(unsigned imm) argument
10917 neon_squash_bits(unsigned imm) argument
10926 neon_qfloat_bits(unsigned imm) argument
11556 int imm = inst.operands[2].imm; local
11568 int imm = inst.operands[2].imm; local
11580 int imm = inst.operands[2].imm; local
11623 int imm = inst.operands[2].imm; local
11650 int imm = inst.operands[2].imm; local
11687 int imm = inst.operands[2].imm; local
11713 unsigned imm = inst.operands[2].imm; local
12202 unsigned imm = (inst.operands[3].imm * et.size) / 8; local
12540 int imm = inst.operands[2].imm; local
[all...]

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