Searched refs:addPred (Results 1 - 8 of 8) sorted by relevance

/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/
H A DScheduleDAGInstrs.cpp262 UseSU->addPred(dep);
294 DefSU->addPred(SDep(SU, Kind, 0, /*Reg=*/*Alias));
298 DefSU->addPred(SDep(SU, Kind, AOLat, /*Reg=*/*Alias));
369 DefSU->addPred(SDep(SU, SDep::Output, OutLatency, Reg));
410 SU->addPred(dep);
417 DefI->SU->addPred(SDep(SU, SDep::Anti, 0, Reg));
557 SUb->addPred(SDep(SUa, SDep::Order, /*Latency=*/0, /*Reg=*/0,
590 (*I)->addPred(SDep(SU, SDep::Order, Latency, /*Reg=*/0,
615 SUb->addPred(SDep(SUa, SDep::Order, TrueMemOrderLatency, /*Reg=*/0,
758 I->second->addPred(SDe
[all...]
H A DScheduleDAG.cpp62 /// addPred - This adds the specified edge as a pred of the current node if
65 bool SUnit::addPred(const SDep &D) { function in class:SUnit
70 // Extend the latency if needed. Equivalent to removePred(I) + addPred(D).
/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/CodeGen/
H A DScheduleDAG.h374 /// addPred - This adds the specified edge as a pred of the current node if
377 bool addPred(const SDep &D);
/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp83 SU->addPred(D);
H A DScheduleDAGSDNodes.cpp495 if (!SU->addPred(dep) && !dep.isCtrl() && OpSU->NumRegDefsLeft > 1) {
H A DScheduleDAGRRList.cpp193 SU->addPred(D);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/
H A DHexagonMachineScheduler.cpp34 SUnits[su].addPred(SDep(LastSequentialCall, SDep::Order, 0, /*Reg=*/0,
/macosx-10.9.5/llvmCore-3425.0.33/lib/Transforms/Scalar/
H A DObjCARC.cpp1577 void addPred(BasicBlock *Pred) { Preds.push_back(Pred); } function in class:__anon10613::BBState
3022 SuccStates.addPred(CurrBB);
3029 BBStates[SuccBB].addPred(CurrBB);

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