Searched refs:UseMI (Results 1 - 25 of 30) sorted by relevance

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/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/
H A DLiveRangeEdit.cpp162 MachineInstr *DefMI = 0, *UseMI = 0; local
176 if (UseMI && UseMI != MI)
181 UseMI = MI;
184 if (!DefMI || !UseMI)
191 LIS.getInstructionIndex(UseMI)))
195 // Assume there are stores between DefMI and UseMI.
201 << " into single use: " << *UseMI); local
204 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second)
207 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Op
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H A DRegisterScavenging.cpp253 /// longest after StargMII. UseMI is set to the instruction where the search
261 MachineBasicBlock::iterator &UseMI) {
319 UseMI = RestorePointMI;
348 MachineBasicBlock::iterator UseMI; local
349 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI);
365 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) {
374 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, ScavengingFrameIndex, RC, TRI);
375 II = prior(UseMI);
379 ScavengeRestore = prior(UseMI);
258 findSurvivorReg(MachineBasicBlock::iterator StartMI, BitVector &Candidates, unsigned InstrLimit, MachineBasicBlock::iterator &UseMI) argument
H A DTargetSchedule.cpp139 const MachineInstr *UseMI, unsigned UseOperIdx,
148 if (UseMI) {
150 TII->getOperandLatency(&InstrItins, DefMI, DefOperIdx, UseMI, UseOperIdx);
182 if (!UseMI)
186 const MCSchedClassDesc *UseDesc = resolveSchedClass(UseMI);
189 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx);
137 computeOperandLatency( const MachineInstr *DefMI, unsigned DefOperIdx, const MachineInstr *UseMI, unsigned UseOperIdx, bool FindMin) const argument
H A DPeepholeOptimizer.cpp190 MachineInstr *UseMI = &*UI; local
191 if (UseMI == MI)
194 if (UseMI->isPHI()) {
220 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG)
223 MachineBasicBlock *UseMBB = UseMI->getParent();
226 if (!LocalMIs.count(UseMI))
266 MachineInstr *UseMI = UseMO->getParent(); local
267 MachineBasicBlock *UseMBB = UseMI->getParent();
278 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI
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H A DDeadMachineInstructionElim.cpp144 MachineInstr *UseMI = Use.getParent(); local
145 if (UseMI==MI)
148 UseMI->getOperand(0).setReg(0U);
H A DOptimizePHIs.cpp144 MachineInstr *UseMI = &*I; local
145 if (!UseMI->isPHI() || !IsDeadPHICycle(UseMI, PHIsInCycle))
H A DMachineTraceMetrics.cpp544 // Get the input data dependencies that must be ready before UseMI can issue.
545 // Return true if UseMI has any physreg operands.
546 static bool getDataDeps(const MachineInstr *UseMI,
550 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) {
570 static void getPHIDeps(const MachineInstr *UseMI,
577 assert(UseMI->isPHI() && UseMI->getNumOperands() % 2 && "Bad PHI");
578 for (unsigned i = 1; i != UseMI->getNumOperands(); i += 2) {
579 if (UseMI->getOperand(i + 1).getMBB() == Pred) {
580 unsigned Reg = UseMI
[all...]
H A DTwoAddressInstructionPass.cpp421 MachineInstr &UseMI = *MRI->use_nodbg_begin(Reg);
422 if (UseMI.getParent() != MBB)
426 if (isCopyToReg(UseMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) {
428 return &UseMI;
431 if (isTwoAddrUse(UseMI, Reg, DstReg)) {
433 return &UseMI;
641 while (MachineInstr *UseMI = findOnlyInterestingUse(Reg, MBB, MRI, TII,IsCopy,
643 if (IsCopy && !Processed.insert(UseMI))
646 DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI);
1549 MachineInstr *UseMI local
1588 MachineInstr *UseMI = &*UI; local
1621 MachineInstr *UseMI = &*UI; local
1642 MachineInstr *UseMI = &*UI; local
[all...]
H A DMachineSSAUpdater.cpp222 MachineInstr *UseMI = U.getParent(); local
224 if (UseMI->isPHI()) {
225 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U);
228 NewVR = GetValueInMiddleOfBlock(UseMI->getParent());
H A DMachineLICM.cpp983 MachineInstr *UseMI = &*UI; local
985 if (UseMI->isPHI()) {
988 if (CurLoop->contains(UseMI))
993 if (isExitBlock(UseMI->getParent()))
998 if (UseMI->isCopy() && CurLoop->contains(UseMI))
999 Work.push_back(UseMI);
1016 MachineInstr *UseMI = &*I; local
1017 if (UseMI->isCopyLike())
1019 if (!CurLoop->contains(UseMI
[all...]
H A DRegisterCoalescer.cpp610 MachineInstr *UseMI = &*UI; local
611 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI);
616 if (UseMI->isRegTiedToDefOperand(UI.getOperandNo()))
655 MachineInstr *UseMI = &*UI; local
657 if (UseMI->isDebugValue()) {
663 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true);
673 if (UseMI == CopyMI)
675 if (!UseMI->isCopy())
677 if (UseMI->getOperand(0).getReg() != IntB.reg ||
678 UseMI
687 DEBUG(dbgs() << "\\t\\tnoop: " << DefIdx << '\\t' << *UseMI); local
[all...]
H A DTailDuplication.cpp256 MachineInstr *UseMI = &*UI; local
258 if (UseMI->isDebugValue()) {
263 UseMI->eraseFromParent();
266 if (UseMI->getParent() == DefBB && !UseMI->isPHI())
333 MachineInstr *UseMI = &*UI; local
334 if (UseMI->isDebugValue())
336 if (UseMI->getParent() != BB)
H A DTargetInstrInfoImpl.cpp598 /// Both DefMI and UseMI must be valid. By default, call directly to the
603 const MachineInstr *UseMI, unsigned UseIdx) const {
605 unsigned UseClass = UseMI->getDesc().getSchedClass();
641 /// dependent def and use when the operand indices are already known. UseMI may
654 const MachineInstr *UseMI, unsigned UseIdx,
664 if (UseMI)
665 OperLatency = getOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx);
601 getOperandLatency(const InstrItineraryData *ItinData, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const argument
652 computeOperandLatency(const InstrItineraryData *ItinData, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx, bool FindMin) const argument
H A DInlineSpiller.cpp235 MachineInstr *UseMI = 0;
256 if (UseMI && MI != UseMI)
258 UseMI = MI;
H A DLiveIntervalAnalysis.cpp617 MachineInstr *UseMI = I.skipInstruction();) {
618 if (UseMI->isDebugValue() || !UseMI->readsVirtualRegister(li->reg))
620 SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot();
627 DEBUG(dbgs() << Idx << '\t' << *UseMI
/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/CodeGen/
H A DTargetSchedule.h84 /// when the operand indices are already known. UseMI may be NULL for an
91 const MachineInstr *UseMI, unsigned UseOperIdx,
H A DRegisterScavenging.h154 /// longest after StartMI. UseMI is set to the instruction where the search
161 MachineBasicBlock::iterator &UseMI);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/
H A DThumb1RegisterInfo.h61 MachineBasicBlock::iterator &UseMI,
H A DMLxExpansionPass.cpp123 MachineInstr *UseMI = &*MRI->use_nodbg_begin(Reg); local
124 if (UseMI->getParent() != MBB)
127 while (UseMI->isCopy() || UseMI->isInsertSubreg()) {
128 Reg = UseMI->getOperand(0).getReg();
132 UseMI = &*MRI->use_nodbg_begin(Reg);
133 if (UseMI->getParent() != MBB)
H A DARMBaseInstrInfo.h217 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI,
226 const MachineInstr *UseMI, unsigned UseIdx) const;
279 const MachineInstr *UseMI, unsigned UseIdx) const;
H A DARMBaseInstrInfo.cpp2241 bool ARMBaseInstrInfo::FoldImmediate(MachineInstr *UseMI, argument
2265 const MCInstrDesc &UseMCID = UseMI->getDesc();
2268 if (UseMI->getOperand(NumOps-1).getReg() == ARM::CPSR)
2274 unsigned UseOpc = UseMI->getOpcode();
2289 Commute = UseMI->getOperand(2).getReg() != Reg;
2341 unsigned Reg1 = UseMI->getOperand(OpIdx).getReg();
2342 bool isKill = UseMI->getOperand(OpIdx).isKill();
2344 AddDefaultCC(AddDefaultPred(BuildMI(*UseMI->getParent(),
2345 UseMI, UseMI
3250 getOperandLatency(const InstrItineraryData *ItinData, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const argument
3622 hasHighOperandLatency(const InstrItineraryData *ItinData, const MachineRegisterInfo *MRI, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const argument
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H A DThumb1RegisterInfo.cpp551 MachineBasicBlock::iterator &UseMI,
564 // The UseMI is where we would like to restore the register. If there's
566 // before that instead and adjust the UseMI.
568 for (MachineBasicBlock::iterator II = I; !done && II != UseMI ; ++II) {
575 UseMI = II;
583 UseMI = II;
590 AddDefaultPred(BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr)).
/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/Target/
H A DTargetInstrInfo.h758 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, argument
792 const MachineInstr *UseMI,
801 const MachineInstr *UseMI, unsigned UseIdx,
834 const MachineInstr *UseMI, unsigned UseIdx) const {
1020 const MachineInstr *UseMI,
831 hasHighOperandLatency(const InstrItineraryData *ItinData, const MachineRegisterInfo *MRI, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const argument
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/
H A DPPCCTRLoops.cpp498 MachineInstr *UseMI = Use.getParent(); local
500 if (MI != UseMI) {
541 MachineInstr *UseMI = Use.getParent(); local
542 if (UseMI==MI)
546 UseMI->getOperand(0).setReg(0U);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/
H A DX86InstrInfo.h376 const MachineInstr *UseMI, unsigned UseIdx) const;

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