Searched refs:sr (Results 1 - 3 of 3) sorted by relevance

/macosx-10.5.8/xnu-1228.15.4/osfmk/ppc/
H A Dserial_io.c496 struct scc_softreg *sr; local
508 sr = &scc->softr[chan];
511 if ((sr->flags & (TF_ODDP|TF_EVENP)) == (tp->t_flags & (TF_ODDP|TF_EVENP))
512 && sr->speed == (unsigned long)tp->t_ispeed) {
522 sr->wr1 = SCC_WR1_RXI_FIRST_CHAR | SCC_WR1_EXT_IE;
523 scc_write_reg(regs, chan, 1, sr->wr1);
531 sr->wr1 = SCC_WR1_RXI_FIRST_CHAR | SCC_WR1_EXT_IE;
532 scc_write_reg(regs, chan, 1, sr->wr1);
539 sr->flags = tp->t_flags;
540 sr
[all...]
H A Dppc_disasm.i112 in 011111sssssaaaaabbbbb1x000110w0r sr{|a}[$x]{w|d}[$w]{|.}[$r] \
/macosx-10.5.8/xnu-1228.15.4/osfmk/chud/ppc/
H A Dchud_cpu_ppc.c57 #define mtsr(sr, reg) __asm__ volatile("sync" "@" "mtsr sr%0, %1 " "@" "isync" : : "i" (sr), "r" (reg));
58 #define mfsr(reg, sr) __asm__ volatile("mfsr %0, sr%1" : "=r" (reg) : "i" (sr));

Completed in 30 milliseconds