Searched refs:order (Results 1 - 16 of 16) sorted by relevance

/macosx-10.5.8/xnu-1228.15.4/bsd/hfs/
H A Dhfs_endian.h65 #warning Unknown byte order
/macosx-10.5.8/xnu-1228.15.4/bsd/sys/
H A Dgmon.h149 uint16_t order; member in struct:tostruct
156 uint16_t order; member in struct:tostruct_64
250 * In order to support more information than in the original mon.out and
273 * order field. The order is the order is a sequence number for the order each
/macosx-10.5.8/xnu-1228.15.4/bsd/crypto/aes/i386/
H A Dedefs.h96 /* if the platform is still unknown, try to find its byte order */
122 # error Please edit edefs.h (lines 117 or 119) to set the platform byte order
H A Daesopt.h44 either big or little endian internal byte order but is faster when the
45 native byte order for the processor is used.
141 for naming bytes and does not imply any adjacency or order relationship
153 numbers. This order is called big-endian if the lowest numbered bytes
157 This code can work in either order irrespective of the order used by the
158 machine on which it runs. Normally the internal byte order will be set
159 to the order of the processor on which the code is to be run but this
173 #error The algorithm byte order is not defined
190 order (whic
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/macosx-10.5.8/xnu-1228.15.4/bsd/crypto/aes/ppc/
H A Daesopt.h47 either big or little endian internal byte order but is faster when the
48 native byte order for the processor is used.
128 b. You may need to set PLATFORM_BYTE_ORDER to define the byte order.
129 c. If you want the code to run in a specific internal byte order, then
150 needs to determine the byte order of the target machine. The following
152 various environemnts define byte order. It may well fail, in which case
214 /* if the platform is still unknown, try to find its byte order */
239 # error Please edit aesopt.h (line 234 or 236) to set the platform byte order
296 for naming bytes and does not imply any adjacency or order relationship
308 numbers. This order i
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/macosx-10.5.8/xnu-1228.15.4/osfmk/ppc/
H A Dhw_vm.s82 ; |00000000|0000000S|SSSSSSSS|SSSSSSSS|SSSSSS00|00000000|0000////| - Shifted high order EA
214 rlwnm r22,r23,r22,22,31 ; Extract the high order
217 addme r22,r22 ; Do high order as well...
592 mr r4,r29 ; High order of address
593 mr r5,r30 ; Low order of address
628 mr r4,r29 ; High order of address
629 mr r5,r30 ; Low order of address
660 rlwinm r23,r29,0,1,0 ; Copy high order vaddr to high if 64-bit machine
913 rlwinm r24,r23,maxAdrSpb,32-maxAdrSpb-maxAdrSpb,31-maxAdrSpb ; Get high order of hash
1044 lwz r4,mpVAddr(r31) ; High order o
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H A Dskiplists.s37 * in increasing order by virtual address. The number of lists a mapping is on is an
389 cmpld cr5,r10,r4 ; make sure VAs come in strictly ascending order
391 bgt-- cr5,mapSkipListPanic ; die if keys are out of order
472 cmplw cr0,r10,r4 ; make sure VAs come in strictly ascending order
474 bgt- cr0,mapSkipListPanic ; die if keys are out of order
H A Dmachine_routines_asm.s887 stw r8,napStamp(r12) ; Set high order time stamp
888 stw r7,napStamp+4(r12) ; Set low order nap stamp
894 lwz r8,napStamp(r12) ; Reload high order time stamp
1258 eieio ; Order, order in the court
H A Dhw_exception.s1458 nodefer: lwz r22,qactTimer(r28) ; Get high order quick activation timer
1460 lwz r23,qactTimer+4(r28) ; Get low order qact timer
1477 bne chkifuser ; If high order is non-zero, this is too big for a decrementer
H A Dlowmem_vectors.s1327 lwz r6,napStamp+4(r2) ; Pick up low order nap stamp
1329 lwz r5,napStamp(r2) ; and high order
2326 ; context has been saved. The new savearea is in kind of hokey, the high order
2339 lwz r6,saver7+4(r13) ; Get the high order half
2371 lis r28,hi16(EXT(ml_probe_read_mck)) ; High order part
2372 lis r27,hi16(EXT(ml_probe_read)) ; High order part
2986 mr r3,r4 ; Point to the new savearea in order to toss it
3029 * In order to save an atomic operation (which actually will not work
H A Dvmachmon_asm.s61 /* Don't change the order of these routines in the table. It's */
552 eieio ; Make sure this stays in order
620 eieio ; Make sure this stays in order
957 stw r6,savesrr0(r30) ; Insure that high order is clear
959 stw r6,savesrr1(r30) ; Insure that high order is clear
H A Dsavearea_asm.s561 lis r9,hi16(EXT(backpocket)) ; Get high order of back pocket
701 lis r9,hi16(EXT(backpocket)) ; Get high order of back pocket
H A Dcswtch.s114 * R3 = switchee's savearea, virtual if continuation, low order physical for full switch
118 * R7 = high order physical address of savearea for full switch
279 ; Note that the low-level code requires the R7 contain the high order half of the savearea's
282 lwz r7,SACvrswap(r11) ; Get the high order V to R translation
283 lwz r11,SACvrswap+4(r11) ; Get the low order V to R translation
610 ; make a dummy access right now in order to get that resolved before we take the lock.
615 lwz r11,SAVlevel(r30) ; Touch the context in order to fault in the segment
1949 // both by vec_save and vec_switch. In order to minimize conditional branches and touching in
H A Dstart.s902 ; - NOTE: Always order from most restrictive to least restrictive matching
H A DEmulate.s344 ; The table of these emulation routines is indexed by taking the low order 4 bits of
/macosx-10.5.8/xnu-1228.15.4/bsd/vfs/
H A Dvfs_bio.c1808 * written in the order that the writes are requested.
2646 * Try BQ_AGE, BQ_LRU, BQ_EMPTY, BQ_META in that order.
3783 * The scan order would be: AGE, LRU, META, EMPTY.
3916 int order[] = { BQ_AGE, BQ_LRU, BQ_META, BQ_EMPTY, 0 }; local
3919 q %= sizeof(order);
3920 return (order[q]);

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