/macosx-10.10.1/llvmCore-3425.0.34/lib/MC/ |
H A D | MCCodeGenInfo.cpp | 18 void MCCodeGenInfo::InitMCCodeGenInfo(Reloc::Model RM, CodeModel::Model CM, argument 21 CMModel = CM;
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/macosx-10.10.1/ruby-106/ruby/enc/ |
H A D | gb18030.c | 43 CM /* first of two- or four-byte char or second of two-byte char */ enumerator in enum:__anon12048 55 C2, CM, CM, CM, CM, CM, CM, CM, CM, CM, C [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/ |
H A D | SparcTargetMachine.cpp | 31 Reloc::Model RM, CodeModel::Model CM, 34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 83 CodeModel::Model CM, 85 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { 95 CodeModel::Model CM, 97 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { 28 SparcTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit) argument 78 SparcV8TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 90 SparcV9TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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H A D | SparcTargetMachine.h | 38 Reloc::Model RM, CodeModel::Model CM, 69 Reloc::Model RM, CodeModel::Model CM, 81 Reloc::Model RM, CodeModel::Model CM,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/ |
H A D | MipsTargetMachine.cpp | 41 Reloc::Model RM, CodeModel::Model CM, 44 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 64 Reloc::Model RM, CodeModel::Model CM, 66 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} 73 Reloc::Model RM, CodeModel::Model CM, 75 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} 39 MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle) argument 62 MipsebTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 71 MipselTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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H A D | MipsTargetMachine.h | 45 Reloc::Model RM, CodeModel::Model CM, 90 Reloc::Model RM, CodeModel::Model CM, 101 Reloc::Model RM, CodeModel::Model CM,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/NVPTX/ |
H A D | NVPTXTargetMachine.cpp | 69 CodeModel::Model CM, 72 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 86 Reloc::Model RM, CodeModel::Model CM, 88 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { 96 Reloc::Model RM, CodeModel::Model CM, 98 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { 63 NVPTXTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions& Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit) argument 83 NVPTXTargetMachine32(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 93 NVPTXTargetMachine64(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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H A D | NVPTXTargetMachine.h | 53 Reloc::Model RM, CodeModel::Model CM, 109 Reloc::Model RM, CodeModel::Model CM, 118 Reloc::Model RM, CodeModel::Model CM,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/ |
H A D | PPCTargetMachine.cpp | 38 Reloc::Model RM, CodeModel::Model CM, 41 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 58 Reloc::Model RM, CodeModel::Model CM, 60 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { 68 Reloc::Model RM, CodeModel::Model CM, 70 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { 35 PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64Bit) argument 55 PPC32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 65 PPC64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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H A D | PPCTargetMachine.h | 43 Reloc::Model RM, CodeModel::Model CM, 80 Reloc::Model RM, CodeModel::Model CM, 91 Reloc::Model RM, CodeModel::Model CM,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MSP430/ |
H A D | MSP430TargetMachine.cpp | 32 Reloc::Model RM, CodeModel::Model CM, 34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 27 MSP430TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ |
H A D | TargetMachineC.cpp | 80 CodeModel::Model CM; local 83 CM = CodeModel::JITDefault; 86 CM = CodeModel::Small; 89 CM = CodeModel::Kernel; 92 CM = CodeModel::Medium; 95 CM = CodeModel::Large; 98 CM = CodeModel::Default; 120 CM, OL));
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/XCore/ |
H A D | XCoreTargetMachine.cpp | 26 Reloc::Model RM, CodeModel::Model CM, 28 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 23 XCoreTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/ |
H A D | ARMTargetMachine.cpp | 43 Reloc::Model RM, CodeModel::Model CM, 45 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 59 Reloc::Model RM, CodeModel::Model CM, 61 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 85 Reloc::Model RM, CodeModel::Model CM, 87 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 40 ARMBaseTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 56 ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 82 ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/ |
H A D | X86TargetMachine.cpp | 36 Reloc::Model RM, CodeModel::Model CM, 38 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false), 59 Reloc::Model RM, CodeModel::Model CM, 61 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true), 75 Reloc::Model RM, CodeModel::Model CM, 78 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 33 X86_32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 56 X86_64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 72 X86TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64Bit) argument
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/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/MC/ |
H A D | MCCodeGenInfo.h | 37 CodeModel::Model CM = CodeModel::Default,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CppBackend/ |
H A D | CPPTargetMachine.h | 27 Reloc::Model RM, CodeModel::Model CM, 25 CPPTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/MCTargetDesc/ |
H A D | MBlazeMCTargetDesc.cpp | 65 CodeModel::Model CM, 70 if (CM == CodeModel::Default) 71 CM = CodeModel::Small; 72 X->InitMCCodeGenInfo(RM, CM, OL); 64 createMBlazeMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/MCTargetDesc/ |
H A D | SPUMCTargetDesc.cpp | 66 CodeModel::Model CM, 71 X->InitMCCodeGenInfo(Reloc::Static, CM, OL); 65 createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/ |
H A D | SPUTargetMachine.cpp | 37 Reloc::Model RM, CodeModel::Model CM, 39 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 34 SPUTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCTargetDesc.cpp | 67 CodeModel::Model CM, 72 X->InitMCCodeGenInfo(Reloc::Static, CM, OL); 66 createHexagonMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/ |
H A D | MBlazeTargetMachine.cpp | 37 Reloc::Model RM, CodeModel::Model CM, 39 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 35 MBlazeTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MSP430/MCTargetDesc/ |
H A D | MSP430MCTargetDesc.cpp | 54 CodeModel::Model CM, 57 X->InitMCCodeGenInfo(RM, CM, OL); 53 createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/NVPTX/MCTargetDesc/ |
H A D | NVPTXMCTargetDesc.cpp | 55 CodeModel::Model CM, 58 X->InitMCCodeGenInfo(RM, CM, OL); 54 createNVPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcMCTargetDesc.cpp | 54 CodeModel::Model CM, 57 X->InitMCCodeGenInfo(RM, CM, OL); 53 createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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