| /macosx-10.10/WebCore-7600.1.25/css/ |
| H A D | CSSInitialValue.h | 42 bool isImplicit() const { return m_isImplicit; } function in class:WebCore::CSSInitialValue
|
| H A D | StyleProperties.h | 68 bool isImplicit() const { return propertyMetadata().m_implicit; } function in class:WebCore::StyleProperties::PropertyReference
78 CSSProperty toCSSProperty() const { return CSSProperty(id(), const_cast<CSSValue*>(propertyValue()), isImportant(), propertyMetadata().m_isSetFromShorthand, propertyMetadata().m_indexInShorthandsVector, isImplicit()); }
|
| H A D | StyleProperties.cpp | 241 if (propertyAt(foundPropertyIndex).isImplicit()) {
279 if (fontSizeProperty.isImplicit() || fontFamilyProperty.isImplicit())
323 if (top.value()->isInitialValue() && right.value()->isInitialValue() && bottom.value()->isInitialValue() && left.value()->isInitialValue() && !top.isImplicit()) {
666 return propertyAt(foundPropertyIndex).isImplicit();
|
| H A D | CSSValue.cpp | 94 return m_classType == InitialClass && toCSSInitialValue(this)->isImplicit();
|
| /macosx-10.10/llvmCore-3425.0.34/lib/Target/Hexagon/ |
| H A D | HexagonMCInstLower.cpp | 55 if (MO.isImplicit()) continue;
|
| H A D | HexagonPeephole.cpp | 307 Dst.ChangeToRegister(Src.getReg(), Src.isDef(), Src.isImplicit(),
|
| H A D | HexagonInstrInfo.cpp | 2241 if ((MO.isReg() && !MO.isUse() && !MO.isImplicit())) {
2247 MO.isImplicit(), MO.isKill(),
2260 PredMO.isImplicit(), PredMO.isKill(),
|
| /macosx-10.10/llvmCore-3425.0.34/lib/Target/ARM/ |
| H A D | ARMMCInstLower.cpp | 72 if (MO.isImplicit() && MO.getReg() != ARM::CPSR)
|
| H A D | Thumb2SizeReduction.cpp | 304 if (!MO.isReg() || MO.isImplicit())
791 if (MO.isReg() && MO.isImplicit() && MO.getReg() == ARM::CPSR)
|
| H A D | ARMCodeEmitter.cpp | 1294 if (!MO.isReg() || MO.isImplicit())
1755 if (!MO.isReg() || MO.isImplicit())
|
| /macosx-10.10/llvmCore-3425.0.34/lib/Target/MSP430/ |
| H A D | MSP430MCInstLower.cpp | 122 if (MO.isImplicit()) continue;
|
| /macosx-10.10/llvmCore-3425.0.34/lib/Target/MBlaze/ |
| H A D | MBlazeMCInstLower.cpp | 126 if (MO.isImplicit()) continue;
|
| H A D | MBlazeDelaySlotFiller.cpp | 166 if (b->getOperand(bop).isReg() && !b->getOperand(bop).isImplicit()) {
|
| /macosx-10.10/llvmCore-3425.0.34/lib/Target/Mips/ |
| H A D | MipsMCInstLower.cpp | 133 if (MO.isImplicit()) break;
|
| /macosx-10.10/llvmCore-3425.0.34/lib/CodeGen/ |
| H A D | MachineInstr.cpp | 270 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() ||
278 if (isImplicit())
286 } else if (isImplicit()) {
668 bool isImpReg = Op.isReg() && Op.isImplicit();
686 while (OpNo && Operands[OpNo-1].isReg() && Operands[OpNo-1].isImplicit()) {
947 if (!MO.isReg() || !MO.isImplicit())
1495 if (MO.isReg() && MO.isImplicit())
1547 !getOperand(StartOp).isImplicit();
1603 MO.isReg() && MO.isImplicit() && MO.isDef()) {
1784 if (getOperand(OpIdx).isImplicit())
[all...] |
| H A D | ExpandPostRAPseudos.cpp | 89 if (!MO.isReg() || !MO.isImplicit() || MO.isUse())
|
| H A D | TargetSchedule.cpp | 195 if (SCDesc->isValid() && !DefMI->getOperand(DefOperIdx).isImplicit()
|
| H A D | MachineLICM.cpp | 447 if (MO.isImplicit()) {
815 if (!MO.isReg() || MO.isImplicit())
847 if (!MO.isReg() || MO.isImplicit())
1108 if (!MO.isReg() || MO.isImplicit())
1185 if (!MO.isReg() || MO.isImplicit())
|
| H A D | MachineVerifier.cpp | 740 if (!MO.isReg() || !MO.isImplicit())
799 else if (MO->isImplicit())
809 if (MO->isImplicit())
825 if (MO->isReg() && !MO->isImplicit() && !MI->isVariadic() && MO->getReg())
853 if (!OtherMO.isImplicit())
867 if (MONum < MCID.getNumOperands() && !MO->isImplicit()) {
|
| H A D | AggressiveAntiDepBreaker.cpp | 243 if (!MO.isReg() || !MO.isImplicit())
256 return((Op != NULL) && Op->isImplicit());
841 if ((AntiDepOp == NULL) || AntiDepOp->isImplicit()) {
|
| H A D | ExecutionDepsFix.cpp | 462 if (MO.isImplicit())
|
| H A D | MachineCSE.cpp | 502 if (MO.isImplicit() && !MO.isDead() && CSMI->getOperand(i).isDead())
|
| H A D | InlineSpiller.cpp | 1030 if (MO.isImplicit()) {
1058 if (!MO.isReg() || !MO.isImplicit())
|
| H A D | RegAllocFast.cpp | 977 definePhysReg(MI, Reg, (MO.isImplicit() || MO.isDead()) ?
1062 definePhysReg(MI, Reg, (MO.isImplicit() || MO.isDead()) ?
|
| /macosx-10.10/llvmCore-3425.0.34/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 277 bool isImplicit() const { function in class:llvm::MachineOperand
|