Searched refs:regbase (Results 1 - 25 of 61) sorted by relevance

123

/linux-master/include/video/
H A Dvga.h220 static inline unsigned char vga_mm_r (void __iomem *regbase, unsigned short port) argument
222 return readb (regbase + port);
225 static inline void vga_mm_w (void __iomem *regbase, unsigned short port, unsigned char val) argument
227 writeb (val, regbase + port);
230 static inline void vga_mm_w_fast (void __iomem *regbase, unsigned short port, argument
233 writew (VGA_OUT16VAL (val, reg), regbase + port);
236 static inline unsigned char vga_r (void __iomem *regbase, unsigned short port) argument
238 if (regbase)
239 return vga_mm_r (regbase, port);
244 static inline void vga_w (void __iomem *regbase, unsigne argument
253 vga_w_fast(void __iomem *regbase, unsigned short port, unsigned char reg, unsigned char val) argument
267 vga_rcrt(void __iomem *regbase, unsigned char reg) argument
273 vga_wcrt(void __iomem *regbase, unsigned char reg, unsigned char val) argument
299 vga_mm_rcrt(void __iomem *regbase, unsigned char reg) argument
305 vga_mm_wcrt(void __iomem *regbase, unsigned char reg, unsigned char val) argument
320 vga_rseq(void __iomem *regbase, unsigned char reg) argument
326 vga_wseq(void __iomem *regbase, unsigned char reg, unsigned char val) argument
352 vga_mm_rseq(void __iomem *regbase, unsigned char reg) argument
358 vga_mm_wseq(void __iomem *regbase, unsigned char reg, unsigned char val) argument
372 vga_rgfx(void __iomem *regbase, unsigned char reg) argument
378 vga_wgfx(void __iomem *regbase, unsigned char reg, unsigned char val) argument
404 vga_mm_rgfx(void __iomem *regbase, unsigned char reg) argument
410 vga_mm_wgfx(void __iomem *regbase, unsigned char reg, unsigned char val) argument
425 vga_rattr(void __iomem *regbase, unsigned char reg) argument
431 vga_wattr(void __iomem *regbase, unsigned char reg, unsigned char val) argument
449 vga_mm_rattr(void __iomem *regbase, unsigned char reg) argument
455 vga_mm_wattr(void __iomem *regbase, unsigned char reg, unsigned char val) argument
[all...]
/linux-master/drivers/video/fbdev/
H A Dwmt_ge_rops.c42 static void __iomem *regbase; variable
63 (p->var.bits_per_pixel == 8 ? 0 : 1), regbase + GE_DEPTH_OFF);
64 writel(p->var.bits_per_pixel == 15 ? 1 : 0, regbase + GE_HIGHCOLOR_OFF);
65 writel(p->fix.smem_start, regbase + GE_DESTBASE_OFF);
66 writel(p->var.xres_virtual - 1, regbase + GE_DESTDISPW_OFF);
67 writel(p->var.yres_virtual - 1, regbase + GE_DESTDISPH_OFF);
68 writel(rect->dx, regbase + GE_DESTAREAX_OFF);
69 writel(rect->dy, regbase + GE_DESTAREAY_OFF);
70 writel(rect->width - 1, regbase + GE_DESTAREAW_OFF);
71 writel(rect->height - 1, regbase
[all...]
H A Dvt8500lcdfb.h10 void __iomem *regbase; member in struct:vt8500lcd_info
H A Dcirrusfb.c356 u8 __iomem *regbase; member in struct:cirrusfb_info
396 static void cirrusfb_WaitBLT(u8 __iomem *regbase);
397 static void cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel,
402 static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel,
411 static void cirrusfb_dbg_reg_dump(struct fb_info *info, caddr_t regbase);
413 caddr_t regbase,
452 long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f;
639 old1f = vga_rseq(cinfo->regbase, CL_SEQR1F) & ~0x40;
645 old1e = vga_rseq(cinfo->regbase, CL_SEQR1E) & ~0x1;
649 vga_wseq(cinfo->regbase, CL_SEQR1
663 u8 __iomem *regbase = cinfo->regbase; local
1864 cirrusfb_get_memsize(struct fb_info *info, u8 __iomem *regbase) argument
2204 unsigned long regbase, ramsize, rambase; local
2586 cirrusfb_WaitBLT(u8 __iomem *regbase) argument
2598 cirrusfb_set_blitter(u8 __iomem *regbase, u_short nwidth, u_short nheight, u_long nsrc, u_long ndest, u_short bltmode, u_short line_length) argument
2658 cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel, u_short curx, u_short cury, u_short destx, u_short desty, u_short width, u_short height, u_short line_length) argument
2702 cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel, u_short x, u_short y, u_short width, u_short height, u32 fg_color, u32 bg_color, u_short line_length, u_char blitmode) argument
2817 cirrusfb_dbg_print_regs(struct fb_info *info, caddr_t regbase, enum cirrusfb_dbg_reg_class reg_class, ...) argument
2863 cirrusfb_dbg_reg_dump(struct fb_info *info, caddr_t regbase) argument
[all...]
H A Dwm8505fb.c38 void __iomem *regbase; member in struct:wm8505fb_info
51 writel(0, fbi->regbase + i);
54 writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR);
55 writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR1);
62 writel(0x31c, fbi->regbase + WMT_GOVR_COLORSPACE);
63 writel(1, fbi->regbase + WMT_GOVR_COLORSPACE1);
66 writel(info->var.xres, fbi->regbase + WMT_GOVR_XRES);
67 writel(info->var.xres_virtual, fbi->regbase + WMT_GOVR_XRES_VIRTUAL);
70 writel(0xf, fbi->regbase + WMT_GOVR_FHI);
71 writel(4, fbi->regbase
[all...]
H A Dvt8500lcdfb.c112 control0 = readl(fbi->regbase) & ~0xf;
113 writel(0, fbi->regbase);
114 while (readl(fbi->regbase + 0x38) & 0x10)
119 | (info->var.right_margin & 0xff), fbi->regbase + 0x4);
123 | (info->var.lower_margin & 0xff), fbi->regbase + 0x8);
125 | ((info->var.xres - 1) & 0x400), fbi->regbase + 0x10);
126 writel(0x80000000, fbi->regbase + 0x20);
127 writel(control0 | (reg_bpp << 1) | 0x100, fbi->regbase);
186 writel(0xffffffff ^ (1 << 3), fbi->regbase + 0x3c);
188 readl(fbi->regbase
[all...]
/linux-master/drivers/clocksource/
H A Dtimer-vt8500.c41 static void __iomem *regbase; variable
46 writel(3, regbase + TIMER_CTRL_VAL);
47 while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE)
50 return readl(regbase + TIMER_COUNT_VAL);
66 while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE)
69 writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL);
74 writel(1, regbase + TIMER_IER_VAL);
81 writel(readl(regbase + TIMER_CTRL_VAL) | 1, regbase + TIMER_CTRL_VAL);
82 writel(0, regbase
[all...]
/linux-master/include/linux/platform_data/
H A Dmv_usb.h36 int (*phy_init)(void __iomem *regbase);
37 void (*phy_deinit)(void __iomem *regbase);
/linux-master/include/linux/
H A Dsvga.h71 static inline void svga_wattr(void __iomem *regbase, u8 index, u8 data) argument
73 vga_r(regbase, VGA_IS1_RC);
74 vga_w(regbase, VGA_ATT_IW, index);
75 vga_w(regbase, VGA_ATT_W, data);
80 static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) argument
82 vga_wseq(regbase, index, (data & mask) | (vga_rseq(regbase, index) & ~mask));
87 static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) argument
89 vga_wcrt(regbase, index, (data & mask) | (vga_rcrt(regbase, inde
[all...]
/linux-master/arch/mips/rb532/
H A Dgpio.c52 void __iomem *regbase; member in struct:rb532_gpio_chip
102 return !!rb532_get_bit(offset, gpch->regbase + GPIOD);
114 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
127 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
129 rb532_set_bit(0, offset, gpch->regbase + GPIOCFG);
144 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
147 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
149 rb532_set_bit(1, offset, gpch->regbase + GPIOCFG);
178 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL);
187 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase
[all...]
/linux-master/drivers/video/fbdev/core/
H A Dsvgalib.c24 void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) argument
29 regval = vga_rcrt(regbase, regset->regnum);
38 vga_wcrt(regbase, regset->regnum, regval);
44 void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) argument
49 regval = vga_rseq(regbase, regset->regnum);
58 vga_wseq(regbase, regset->regnum, regval);
79 void svga_set_default_gfx_regs(void __iomem *regbase) argument
82 vga_wgfx(regbase, VGA_GFX_SR_VALUE, 0x00);
83 vga_wgfx(regbase, VGA_GFX_SR_ENABLE, 0x00);
84 vga_wgfx(regbase, VGA_GFX_COMPARE_VALU
97 svga_set_default_atc_regs(void __iomem *regbase) argument
120 svga_set_default_seq_regs(void __iomem *regbase) argument
131 svga_set_default_crt_regs(void __iomem *regbase) argument
141 svga_set_textmode_vga_regs(void __iomem *regbase) argument
303 svga_tilecursor(void __iomem *regbase, struct fb_info *info, struct fb_tilecursor *cursor) argument
512 svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node) argument
[all...]
/linux-master/include/linux/comedi/
H A Dcomedi_8255.h34 unsigned long regbase);
38 unsigned long regbase)
45 unsigned long regbase);
36 subdev_8255_io_init(struct comedi_device *dev, struct comedi_subdevice *s, unsigned long regbase) argument
/linux-master/drivers/rtc/
H A Drtc-sh.c97 void __iomem *regbase; member in struct:sh_rtc
114 tmp = readb(rtc->regbase + RCR1);
117 writeb(tmp, rtc->regbase + RCR1);
130 tmp = readb(rtc->regbase + RCR1);
133 writeb(tmp, rtc->regbase + RCR1);
145 tmp = readb(rtc->regbase + RCR2);
148 writeb(tmp, rtc->regbase + RCR2);
222 tmp = readb(rtc->regbase + RCR1);
229 writeb(tmp, rtc->regbase + RCR1);
239 tmp = readb(rtc->regbase
[all...]
H A Drtc-vt8500.c73 void __iomem *regbase; member in struct:vt8500_rtc
88 isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS);
89 writel(isr, vt8500_rtc->regbase + VT8500_RTC_IS);
106 date = readl(vt8500_rtc->regbase + VT8500_RTC_DR);
107 time = readl(vt8500_rtc->regbase + VT8500_RTC_TR);
129 vt8500_rtc->regbase + VT8500_RTC_DS);
134 vt8500_rtc->regbase + VT8500_RTC_TS);
144 alarm = readl(vt8500_rtc->regbase + VT8500_RTC_AS);
145 isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS);
167 vt8500_rtc->regbase
[all...]
/linux-master/drivers/clk/uniphier/
H A Dclk-uniphier-cpugear.c21 unsigned int regbase; member in struct:uniphier_clk_cpugear
35 gear->regbase + UNIPHIER_CLK_CPUGEAR_SET,
41 gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD,
48 gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD,
61 gear->regbase + UNIPHIER_CLK_CPUGEAR_STAT, &val);
96 gear->regbase = data->regbase;
/linux-master/drivers/ufs/host/
H A Dti-j721e-ufs.c22 void __iomem *regbase; local
27 regbase = devm_platform_ioremap_resource(pdev, 0);
28 if (IS_ERR(regbase))
29 return PTR_ERR(regbase);
50 writel(reg, regbase + TI_UFS_SS_CTRL);
/linux-master/drivers/spi/
H A Dspi-rockchip-sfc.c174 void __iomem *regbase; member in struct:rockchip_sfc
192 writel_relaxed(SFC_RCVR_RESET, sfc->regbase + SFC_RCVR);
194 err = readl_poll_timeout(sfc->regbase + SFC_RCVR, status,
201 writel_relaxed(0xFFFFFFFF, sfc->regbase + SFC_ICLR);
210 return (u16)(readl(sfc->regbase + SFC_VER) & 0xffff);
223 reg = readl(sfc->regbase + SFC_IMR);
225 writel(reg, sfc->regbase + SFC_IMR);
233 reg = readl(sfc->regbase + SFC_IMR);
235 writel(reg, sfc->regbase + SFC_IMR);
240 writel(0, sfc->regbase
[all...]
H A Dspi-hisi-sfc-v3xx.c77 void __iomem *regbase; member in struct:hisi_sfc_v3xx_host
86 writel(0, host->regbase + HISI_SFC_V3XX_INT_MASK);
91 writel(HISI_SFC_V3XX_INT_MASK_ALL, host->regbase + HISI_SFC_V3XX_INT_MASK);
96 writel(HISI_SFC_V3XX_INT_MASK_ALL, host->regbase + HISI_SFC_V3XX_INT_CLR);
108 reg = readl(host->regbase + HISI_SFC_V3XX_RAW_INT_STAT);
141 return readl_poll_timeout(host->regbase + HISI_SFC_V3XX_CMD_CFG, reg,
204 from = host->regbase + HISI_SFC_V3XX_CMD_DATABUF0;
241 to = host->regbase + HISI_SFC_V3XX_CMD_DATABUF0;
309 writel(op->addr.val, host->regbase + HISI_SFC_V3XX_CMD_ADDR);
310 writel(op->cmd.opcode, host->regbase
[all...]
/linux-master/drivers/gpio/
H A Dgpio-pxa.c65 void __iomem *regbase; member in struct:pxa_gpio_bank
164 return bank->regbase;
341 static int pxa_init_gpio_chip(struct pxa_gpio_chip *pchip, int ngpio, void __iomem *regbase) argument
369 bank->regbase = regbase + BANK_OFF(i);
382 grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~c->irq_mask;
383 gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~c->irq_mask;
386 writel_relaxed(grer, c->regbase + GRER_OFFSET);
387 writel_relaxed(gfer, c->regbase + GFER_OFFSET);
410 gpdr = readl_relaxed(c->regbase
[all...]
H A Dgpio-f7188x.c88 unsigned int regbase; member in struct:f7188x_gpio_bank
181 .regbase = _regbase, \
300 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase));
325 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase));
331 superio_outb(sio->addr, f7188x_gpio_dir(bank->regbase), dir);
350 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase));
353 data = superio_inb(sio->addr, f7188x_gpio_data_out(bank->regbase));
355 data = superio_inb(sio->addr, f7188x_gpio_data_in(bank->regbase));
375 data_out = superio_inb(sio->addr, f7188x_gpio_data_out(bank->regbase));
380 superio_outb(sio->addr, f7188x_gpio_data_out(bank->regbase), data_ou
[all...]
/linux-master/drivers/comedi/drivers/
H A Dcomedi_8255.c44 int dir, int port, int data, unsigned long regbase)
47 outb(data, dev->iobase + regbase + port);
50 return inb(dev->iobase + regbase + port);
56 int dir, int port, int data, unsigned long regbase)
59 writeb(data, dev->mmio + regbase + port);
62 return readb(dev->mmio + regbase + port);
183 * @regbase: offset of 8255 registers from dev->iobase
190 unsigned long regbase)
192 return __subdev_8255_init(dev, s, subdev_8255_io, regbase);
202 * @regbase
43 subdev_8255_io(struct comedi_device *dev, int dir, int port, int data, unsigned long regbase) argument
55 subdev_8255_mmio(struct comedi_device *dev, int dir, int port, int data, unsigned long regbase) argument
189 subdev_8255_io_init(struct comedi_device *dev, struct comedi_subdevice *s, unsigned long regbase) argument
208 subdev_8255_mm_init(struct comedi_device *dev, struct comedi_subdevice *s, unsigned long regbase) argument
[all...]
H A D8255.c107 unsigned long regbase = subdev_8255_regbase(s); local
109 release_region(regbase, I8255_SIZE);
/linux-master/drivers/clk/socfpga/
H A Dclk-gate-s10.c127 struct clk_hw *s10_register_gate(const struct stratix10_gate_clock *clks, void __iomem *regbase) argument
139 socfpga_clk->hw.reg = regbase + clks->gate_reg;
148 socfpga_clk->div_reg = regbase + clks->div_reg;
156 socfpga_clk->bypass_reg = regbase + clks->bypass_reg;
185 struct clk_hw *agilex_register_gate(const struct stratix10_gate_clock *clks, void __iomem *regbase) argument
197 socfpga_clk->hw.reg = regbase + clks->gate_reg;
206 socfpga_clk->div_reg = regbase + clks->div_reg;
214 socfpga_clk->bypass_reg = regbase + clks->bypass_reg;
/linux-master/drivers/mtd/spi-nor/controllers/
H A Dhisi-sfc.c93 void __iomem *regbase; member in struct:hifmc_host
107 return readl_poll_timeout(host->regbase + FMC_INT, reg,
144 writel(reg, host->regbase + FMC_SPI_TIMING_CFG);
187 writel(reg, host->regbase + FMC_CMD);
190 writel(reg, host->regbase + FMC_DATA_NUM);
193 writel(reg, host->regbase + FMC_OP_CFG);
195 writel(0xff, host->regbase + FMC_INT_CLR);
197 writel(reg, host->regbase + FMC_OP);
237 reg = readl(host->regbase + FMC_CFG);
242 writel(reg, host->regbase
[all...]
/linux-master/drivers/clk/at91/
H A Dsckc.c370 void __iomem *regbase = of_iomap(np, 0); local
381 if (!regbase)
384 slow_rc = at91_clk_register_slow_rc_osc(regbase, "slow_rc_osc",
410 slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc",
417 slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_hws,
471 void __iomem *regbase = of_iomap(np, 0); local
482 if (!regbase)
497 slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc",
517 clk_data->hws[1] = at91_clk_register_sam9x5_slow(regbase, "td_slck",
586 void __iomem *regbase local
[all...]

Completed in 498 milliseconds

123