/linux-master/drivers/gpu/drm/stm/ |
H A D | ltdc.h | 46 struct clk *pixel_clk; /* lcd pixel clock */ member in struct:ltdc_device
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H A D | ltdc.c | 841 result = clk_round_rate(ldev->pixel_clk, target); 877 if (clk_set_rate(ldev->pixel_clk, rate) < 0) { 882 adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000; 1898 clk_disable_unprepare(ldev->pixel_clk); 1908 ret = clk_prepare_enable(ldev->pixel_clk); 1938 ldev->pixel_clk = devm_clk_get(dev, "lcd"); 1939 if (IS_ERR(ldev->pixel_clk)) { 1940 if (PTR_ERR(ldev->pixel_clk) != -EPROBE_DEFER) 1942 return PTR_ERR(ldev->pixel_clk); 1945 if (clk_prepare_enable(ldev->pixel_clk)) { [all...] |
/linux-master/drivers/phy/mediatek/ |
H A D | phy-mtk-hdmi-mt8195.c | 213 u64 tmds_clk, pixel_clk, da_hdmitx21_ref_ck, ns_hdmipll_ck, pcw; local 218 pixel_clk = rate; 219 tmds_clk = pixel_clk; 291 digital_div = div_u64(ns_hdmipll_ck, posdiv1 * posdiv2 * pixel_clk); 307 u32 pixel_clk = hdmi_phy->pll_rate; local 309 tmds_clk = pixel_clk; 327 } else if (((u64)pixel_clk * 1000) >= 74175 * MEGA && pixel_clk <= 300 * MEGA) { 332 } else if (pixel_clk >= 27 * MEGA && ((u64)pixel_clk * 100 [all...] |
/linux-master/drivers/media/platform/cadence/ |
H A D | cdns-csi2rx.c | 87 struct clk *pixel_clk[CSI2RX_STREAMS_MAX]; member in struct:csi2rx_priv 271 ret = clk_prepare_enable(csi2rx->pixel_clk[i]); 310 clk_disable_unprepare(csi2rx->pixel_clk[i - 1]); 347 clk_disable_unprepare(csi2rx->pixel_clk[i]); 591 csi2rx->pixel_clk[i] = devm_clk_get(&pdev->dev, name); 592 if (IS_ERR(csi2rx->pixel_clk[i])) { 594 return PTR_ERR(csi2rx->pixel_clk[i]);
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H A D | cdns-csi2tx.c | 108 struct clk *pixel_clk[CSI2TX_STREAMS_MAX]; member in struct:csi2tx_priv 485 csi2tx->pixel_clk[i] = devm_clk_get(&pdev->dev, clk_name); 486 if (IS_ERR(csi2tx->pixel_clk[i])) { 489 return PTR_ERR(csi2tx->pixel_clk[i]);
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/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_audio.c | 427 unsigned int h_active, h_total, hblank_delta, pixel_clk; local 434 pixel_clk = crtc_state->hw.adjusted_mode.crtc_clock; 446 if (WARN_ON(!link_clk || !pixel_clk || !lanes || !vdsc_bppx16 || !cdclk)) 449 link_clks_available = (h_total - h_active) * link_clk / pixel_clk - 28; 450 link_clks_required = DIV_ROUND_UP(192000 * h_total, 1000 * pixel_clk) * (48 / lanes + 2); 455 hblank_delta = DIV64_U64_ROUND_UP(mul_u32_u32(5 * (link_clk + cdclk), pixel_clk), 458 tu_data = div64_u64(mul_u32_u32(pixel_clk * vdsc_bppx16 * 8, 1000000), 461 mul_u32_u32(64 * pixel_clk, 1000000)); 464 hblank_rise = (link_clks_active + 6 * DIV_ROUND_UP(link_clks_active, 250) + 4) * pixel_clk / link_clk; 471 unsigned int h_active, h_total, pixel_clk; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/inc/ |
H A D | clock_source.h | 179 unsigned int pixel_clk,
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/linux-master/drivers/gpu/drm/mediatek/ |
H A D | mtk_dpi.c | 72 struct clk *pixel_clk; member in struct:mtk_dpi 473 clk_disable_unprepare(dpi->pixel_clk); 490 ret = clk_prepare_enable(dpi->pixel_clk); 539 clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2); 541 clk_set_rate(dpi->pixel_clk, vm.pixelclock); 544 vm.pixelclock = clk_get_rate(dpi->pixel_clk); 1044 dpi->pixel_clk = devm_clk_get(dev, "pixel"); 1045 if (IS_ERR(dpi->pixel_clk)) 1046 return dev_err_probe(dev, PTR_ERR(dpi->pixel_clk),
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/linux-master/drivers/gpu/drm/msm/dsi/ |
H A D | dsi_host.c | 120 struct clk *pixel_clk; member in struct:msm_dsi_host 303 msm_host->pixel_clk = msm_clk_get(pdev, "pixel"); 304 if (IS_ERR(msm_host->pixel_clk)) { 305 ret = PTR_ERR(msm_host->pixel_clk); 308 msm_host->pixel_clk = NULL; 369 ret = clk_set_rate(msm_host->pixel_clk, msm_host->pixel_clk_rate); 404 ret = clk_prepare_enable(msm_host->pixel_clk); 420 clk_disable_unprepare(msm_host->pixel_clk); 455 ret = clk_set_rate(msm_host->pixel_clk, msm_host->pixel_clk_rate); 486 ret = clk_prepare_enable(msm_host->pixel_clk); [all...] |
/linux-master/drivers/gpu/drm/bridge/synopsys/ |
H A D | dw-hdmi.c | 564 static unsigned int hdmi_compute_n(unsigned int freq, unsigned long pixel_clk) argument 576 if (pixel_clk == 25175000) 578 else if (pixel_clk == 27027000) 580 else if (pixel_clk == 74176000 || pixel_clk == 148352000) 582 else if (pixel_clk == 297000000) 590 if (pixel_clk == 25175000) 592 else if (pixel_clk == 74176000) 594 else if (pixel_clk == 148352000) 596 else if (pixel_clk 646 hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, unsigned long pixel_clk, unsigned int sample_rate) argument [all...] |
/linux-master/drivers/gpu/drm/aspeed/ |
H A D | aspeed_gfx_crtc.c | 93 clk_set_rate(priv->pixel_clk, m->crtc_clock * 1000);
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/linux-master/drivers/gpu/drm/amd/display/include/ |
H A D | grph_object_ctrl_defs.h | 128 uint32_t pixel_clk; /* in KHz */ member in struct:device_timing
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/linux-master/drivers/gpu/drm/msm/dp/ |
H A D | dp_ctrl.c | 89 struct clk *pixel_clk; member in struct:dp_ctrl_private 1723 ret = clk_set_rate(ctrl->pixel_clk, pixel_rate * 1000); 1732 ret = clk_prepare_enable(ctrl->pixel_clk); 1977 ret = clk_set_rate(ctrl->pixel_clk, pixel_rate * 1000); 1986 ret = clk_prepare_enable(ctrl->pixel_clk); 2045 clk_disable_unprepare(ctrl->pixel_clk); 2098 clk_disable_unprepare(ctrl->pixel_clk); 2198 ctrl->pixel_clk = devm_clk_get(dev, "stream_pixel"); 2199 if (IS_ERR(ctrl->pixel_clk)) 2200 return PTR_ERR(ctrl->pixel_clk); [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/bios/ |
H A D | command_table.c | 1542 uint64_t pixel_clk = (uint64_t)bp_params->pixel_clock; local 1546 div_u64(pixel_clk * pixel_clk_10_khz_out, 1592 uint64_t pixel_clk = (uint64_t)bp_params->pixel_clock; local 1596 div_u64(pixel_clk * pixel_clk_10_khz_out,
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H A D | bios_parser.c | 1239 info->lcd_timing.pixel_clk = 1357 info->lcd_timing.pixel_clk =
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H A D | bios_parser2.c | 1452 info->lcd_timing.pixel_clk = le16_to_cpu(lvds->lcd_timing.pixclk) * 10;
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/linux-master/drivers/gpu/ipu-v3/ |
H A D | ipu-csi.c | 192 static int ipu_csi_set_testgen_mclk(struct ipu_csi *csi, u32 pixel_clk, argument 198 div_ratio = (ipu_clk / pixel_clk) - 1; 202 "value of pixel_clk extends normal range\n");
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/linux-master/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_clock_source.c | 1204 unsigned int pixel_clk, 1210 REG_WRITE(PHASE[inst], pixel_clk); 1201 dcn20_override_dp_pix_clk( struct clock_source *clock_source, unsigned int inst, unsigned int pixel_clk, unsigned int ref_clk) argument
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/linux-master/drivers/gpu/drm/i915/gvt/ |
H A D | handlers.c | 681 u64 pixel_clk = 0; local 686 pixel_clk = div_u64(mul_u32_u32(link_m, dp_br), link_n); 687 pixel_clk *= MSEC_PER_SEC; 689 /* Calcuate refresh rate by (pixel_clk / (h_total * v_total)) */ 690 new_rate = DIV64_U64_ROUND_CLOSEST(mul_u64_u32_shr(pixel_clk, MSEC_PER_SEC, 0), mul_u32_u32(htotal + 1, vtotal + 1));
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