Searched refs:omap3_dpll4_set_rate_and_parent (Results 1 - 3 of 3) sorted by relevance

/linux-master/drivers/clk/ti/
H A Dclock.h291 int omap3_dpll4_set_rate_and_parent(struct clk_hw *hw, unsigned long rate,
H A Ddpll.c128 .set_rate_and_parent = &omap3_dpll4_set_rate_and_parent,
H A Ddpll3xxx.c1027 * omap3_dpll4_set_rate_and_parent - set rate and parent for omap3 per-dpll
1038 int omap3_dpll4_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, function

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