Searched refs:mmRDPCSTX5_RDPCSTX_DMCU_DPALT_PHY_CNTL3_BASE_IDX (Results 1 - 2 of 2) sorted by relevance

/linux-master/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_2_0_0_offset.h633 #define mmRDPCSTX5_RDPCSTX_DMCU_DPALT_PHY_CNTL3_BASE_IDX 2 macro
H A Ddpcs_3_0_0_offset.h598 #define mmRDPCSTX5_RDPCSTX_DMCU_DPALT_PHY_CNTL3_BASE_IDX 2 macro

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