Searched refs:mmDIG1_HDMI_ACR_32_0 (Results 1 - 14 of 14) sorted by relevance

/linux-master/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2618 #define mmDIG1_HDMI_ACR_32_0 0x1F37 macro
H A Ddce_8_0_d.h3185 #define mmDIG1_HDMI_ACR_32_0 0x1f37 macro
H A Ddce_10_0_d.h3964 #define mmDIG1_HDMI_ACR_32_0 0x4b2e macro
H A Ddce_11_2_d.h5060 #define mmDIG1_HDMI_ACR_32_0 0x4b2e macro
H A Ddce_11_0_d.h3829 #define mmDIG1_HDMI_ACR_32_0 0x4b2e macro
H A Ddce_12_0_offset.h10398 #define mmDIG1_HDMI_ACR_32_0 macro
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/linux-master/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5696 #define mmDIG1_HDMI_ACR_32_0 0x2196 macro
H A Ddcn_3_0_3_offset.h5246 #define mmDIG1_HDMI_ACR_32_0 0x21a7 macro
H A Ddcn_1_0_offset.h8575 #define mmDIG1_HDMI_ACR_32_0 0x2196 macro
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H A Ddcn_2_1_0_offset.h10091 #define mmDIG1_HDMI_ACR_32_0 0x2196 macro
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H A Ddcn_3_0_1_offset.h8208 #define mmDIG1_HDMI_ACR_32_0 0x21a7 macro
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H A Ddcn_2_0_0_offset.h11184 #define mmDIG1_HDMI_ACR_32_0 macro
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H A Ddcn_3_0_0_offset.h10984 #define mmDIG1_HDMI_ACR_32_0 macro
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H A Ddcn_3_0_2_offset.h9840 #define mmDIG1_HDMI_ACR_32_0 0x21a7 macro
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