| /linux-master/drivers/clk/axs10x/ |
| H A D | i2s_pll_clock.c | 26 unsigned int idiv; member in struct:i2s_pll_cfg
102 unsigned int idiv, fbdiv, odiv; local
104 idiv = i2s_pll_get_value(i2s_pll_read(clk, PLL_IDIV_REG));
108 return ((parent_rate / idiv) * fbdiv) / odiv;
144 i2s_pll_write(clk, PLL_IDIV_REG, pll_cfg[i].idiv);
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| H A D | pll_clock.c | 68 u32 idiv; member in struct:axs10x_pll_cfg
139 u32 idiv, fbdiv, odiv; local
142 idiv = axs10x_div_get_value(axs10x_pll_read(clk, PLL_REG_IDIV));
147 do_div(rate, idiv * odiv);
183 axs10x_encode_div(pll_cfg[i].idiv, 0));
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| /linux-master/drivers/clk/ |
| H A D | clk-hsdk-pll.c | 48 u32 idiv; member in struct:hsdk_pll_cfg
141 val |= cfg->idiv << CGU_PLL_CTRL_IDIV_SHIFT;
172 u32 idiv, fbdiv, odiv; local
187 /* input divider = reg.idiv + 1 */
188 idiv = 1 + ((val & CGU_PLL_CTRL_IDIV_MASK) >> CGU_PLL_CTRL_IDIV_SHIFT);
195 do_div(rate, idiv * odiv);
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| H A D | clk-versaclock3.c | 291 unsigned long idiv; local
301 idiv = DIV_ROUND_UP(*parent_rate, rate);
303 if (idiv > 63)
306 if (idiv > 31)
310 return *parent_rate / idiv;
318 unsigned long idiv; local
329 idiv = DIV_ROUND_UP(parent_rate, rate);
331 if (idiv == 2) {
337 div = VC3_PLL1_M_DIV(idiv);
339 div = VC3_PLL2_M_DIV(idiv);
[all...] |
| H A D | clk-versaclock5.c | 369 unsigned long idiv; local
379 idiv = DIV_ROUND_UP(*parent_rate, rate);
380 if (idiv > 127)
383 return *parent_rate / idiv;
391 unsigned long idiv; local
405 idiv = DIV_ROUND_UP(parent_rate, rate);
408 if (idiv == 2)
411 div = VC5_REF_DIVIDER_REF_DIV(idiv);
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| H A D | clk-si5351.c | 271 unsigned char idiv; local
275 idiv = SI5351_CLKIN_DIV_8;
278 idiv = SI5351_CLKIN_DIV_4;
281 idiv = SI5351_CLKIN_DIV_2;
284 idiv = SI5351_CLKIN_DIV_1;
288 SI5351_CLKIN_DIV_MASK, idiv);
291 __func__, (1 << (idiv >> 6)), rate);
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| /linux-master/drivers/net/dsa/sja1105/ |
| H A D | sja1105_clocking.c | 46 u64 idiv; member in struct:sja1105_cgu_idiv
102 static void sja1105_cgu_idiv_packing(void *buf, struct sja1105_cgu_idiv *idiv, argument
107 sja1105_packing(buf, &idiv->clksrc, 28, 24, size, op);
108 sja1105_packing(buf, &idiv->autoblock, 11, 11, size, op);
109 sja1105_packing(buf, &idiv->idiv, 5, 2, size, op);
110 sja1105_packing(buf, &idiv->pd, 0, 0, size, op);
118 struct sja1105_cgu_idiv idiv; local
125 dev_err(dev, "idiv factor must be 1 or 10\n");
130 idiv
[all...] |
| /linux-master/drivers/clk/microchip/ |
| H A D | clk-core.c | 585 u32 idiv; /* PLL iclk divider, treated fixed */ member in struct:pic32_sys_pll
608 parent_rate /= pll->idiv;
657 /* pll_in_rate = parent_rate / idiv
660 pll_in_rate = parent_rate / pll->idiv;
748 /* cache PLL idiv; PLL driver uses it as constant.*/
749 spll->idiv = (readl(spll->ctrl_reg) >> PLL_IDIV_SHIFT) & PLL_IDIV_MASK;
750 spll->idiv += 1;
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| /linux-master/drivers/scsi/ |
| H A D | ncr53c8xx.c | 5360 u_char idiv; local
5375 idiv = ((scntl3 >> 4) & 0x7);
5376 if ((sxfer & 0x1f) && idiv)
5377 tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
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| /linux-master/arch/x86/kvm/ |
| H A D | emulate.c | 1018 FASTOP1SRC2EX(idiv, idiv_ex);
|