Searched refs:fixed_div (Results 1 - 15 of 15) sorted by relevance
/linux-master/drivers/clk/socfpga/ |
H A D | clk-gate-a10.c | 27 if (socfpgaclk->fixed_div) 28 div = socfpgaclk->fixed_div; 47 u32 fixed_div; local 71 rc = of_property_read_u32(node, "fixed-divider", &fixed_div); 73 socfpga_clk->fixed_div = 0; 75 socfpga_clk->fixed_div = fixed_div;
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H A D | clk-periph-a10.c | 26 if (socfpgaclk->fixed_div) { 27 div = socfpgaclk->fixed_div; 70 u32 fixed_div; local 90 rc = of_property_read_u32(node, "fixed-divider", &fixed_div); 92 periph_clk->fixed_div = 0; 94 periph_clk->fixed_div = fixed_div;
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H A D | clk-periph.c | 23 if (socfpgaclk->fixed_div) { 24 div = socfpgaclk->fixed_div; 60 u32 fixed_div; local 80 rc = of_property_read_u32(node, "fixed-divider", &fixed_div); 82 periph_clk->fixed_div = 0; 84 periph_clk->fixed_div = fixed_div;
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H A D | clk.h | 46 u32 fixed_div; member in struct:socfpga_gate_clk 58 u32 fixed_div; member in struct:socfpga_periph_clk
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H A D | clk-gate.c | 94 if (socfpgaclk->fixed_div) 95 div = socfpgaclk->fixed_div; 141 u32 fixed_div; local 170 rc = of_property_read_u32(node, "fixed-divider", &fixed_div); 172 socfpga_clk->fixed_div = 0; 174 socfpga_clk->fixed_div = fixed_div;
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H A D | clk-gate-s10.c | 27 if (socfpgaclk->fixed_div) { 28 div = socfpgaclk->fixed_div; 145 socfpga_clk->fixed_div = clks->fixed_div; 203 socfpga_clk->fixed_div = clks->fixed_div;
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H A D | stratix10-clk.h | 73 u8 fixed_div; member in struct:stratix10_gate_clock
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H A D | clk-periph-s10.c | 53 if (socfpgaclk->fixed_div) { 54 div = socfpgaclk->fixed_div; 196 periph_clk->fixed_div = clks->fixed_divider;
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/linux-master/drivers/clk/renesas/ |
H A D | rcar-gen3-cpg.c | 157 * clk->rate = (parent->rate * mult / 32 ) / fixed_div 169 unsigned int fixed_div; member in struct:cpg_z_clk 186 32 * zclk->fixed_div); 205 prate * zclk->fixed_div); 207 prate = req->best_parent_rate / zclk->fixed_div; 227 mult = DIV64_U64_ROUND_CLOSEST(rate * 32ULL * zclk->fixed_div, 293 zclk->fixed_div = div; /* PLLVCO x 1/div x SYS-CPU divider */ 302 zclk->fixed_div;
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H A D | rcar-gen4-cpg.c | 190 unsigned int fixed_div; member in struct:cpg_z_clk 207 32 * zclk->fixed_div); 226 prate * zclk->fixed_div); 228 prate = req->best_parent_rate / zclk->fixed_div; 248 mult = DIV64_U64_ROUND_CLOSEST(rate * 32ULL * zclk->fixed_div, 317 zclk->fixed_div = div; /* PLLVCO x 1/div x SYS-CPU divider */ 326 zclk->fixed_div;
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/linux-master/arch/arm/mach-omap1/ |
H A D | clock.h | 73 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div 89 u8 fixed_div; member in struct:omap1_clk
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H A D | clock.c | 808 WARN_ON(!clk->fixed_div); 810 return p_rate / clk->fixed_div;
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H A D | clock_data.c | 182 .fixed_div = 14,
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/linux-master/drivers/clk/qcom/ |
H A D | gcc-ipq4019.c | 62 * @fixed_div: fixed divider value if divider is fixed 71 u32 fixed_div; member in struct:clk_fepll 266 if (pll->fixed_div) { 267 pre_div = pll->fixed_div; 289 .fixed_div = 28, 305 .fixed_div = 32, 321 .fixed_div = 32, 337 .fixed_div = 20, 353 .fixed_div = 8,
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/linux-master/include/linux/clk/ |
H A D | ti.h | 170 u8 fixed_div; member in struct:clk_hw_omap
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