Searched refs:atb_parents (Results 1 - 13 of 13) sorted by relevance

/linux-master/drivers/clk/mediatek/
H A Dclk-mt8173-topckgen.c258 static const char * const atb_parents[] = { variable
569 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, 0x0090, 16, 2, 23),
H A Dclk-mt7622.c169 static const char * const atb_parents[] = { variable
436 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents,
H A Dclk-mt7629.c224 static const char * const atb_parents[] = { variable
507 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents,
H A Dclk-mt2712.c331 static const char * const atb_parents[] = { variable
680 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, 0x090, 16, 2, 23),
H A Dclk-mt8365.c136 static const char * const atb_parents[] = { variable
422 MUX_GATE_CLR_SET_UPD(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, 0x050,
H A Dclk-mt6797.c248 static const char * const atb_parents[] = { variable
360 MUX(CLK_TOP_MUX_ATB, "atb_sel", atb_parents,
H A Dclk-mt6765.c205 static const char * const atb_parents[] = { variable
386 MUX_GATE_CLR_SET_UPD(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, CLK_CFG_1,
H A Dclk-mt8188-topckgen.c463 static const char * const atb_parents[] = { variable
1036 atb_parents, 0x080, 0x084, 0x088, 16, 4, 23, 0x08, 2),
H A Dclk-mt8183.c323 static const char * const atb_parents[] = { variable
515 atb_parents, 0xa0, 0xa4, 0xa8, 0, 2, 7, 0x004, 24),
H A Dclk-mt8192.c318 static const char * const atb_parents[] = { variable
620 atb_parents, 0x090, 0x094, 0x098, 16, 2, 23, 0x008, 3),
H A Dclk-mt6779.c410 static const char * const atb_parents[] = { variable
707 MUX_GATE_CLR_SET_UPD(CLK_TOP_ATB, "atb_sel", atb_parents,
H A Dclk-mt8195-topckgen.c403 static const char * const atb_parents[] = { variable
967 atb_parents, 0x08C, 0x090, 0x094, 8, 2, 15, 0x08, 5),
/linux-master/drivers/clk/sprd/
H A Dsc9863a-clk.c684 static const struct clk_parent_data atb_parents[] = { variable in typeref:struct:clk_parent_data
690 static SPRD_COMP_CLK_DATA(atb_clk, "atb-clk", atb_parents, 0xa50,

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