Searched refs:VF610_CLK_PLL6_MAIN_DIV (Results 1 - 3 of 3) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dvf610-clock.h40 #define VF610_CLK_PLL6_MAIN_DIV 31 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dvf610-clock.h40 #define VF610_CLK_PLL6_MAIN_DIV 31 macro
/linux-master/drivers/clk/imx/
H A Dclk-vf610.c279 clk[VF610_CLK_PLL6_MAIN_DIV] = imx_clk_divider("pll6_video_div", "pll6_video", CCM_CACRR, 21, 1);

Completed in 112 milliseconds