Searched refs:PLL4 (Results 1 - 13 of 13) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dqcom,lcc-ipq806x.h9 #define PLL4 0 macro
H A Dqcom,lcc-msm8960.h9 #define PLL4 0 macro
H A Dstm32mp13-clks.h22 #define PLL4 9 macro
H A Dstm32mp1-clks.h186 #define PLL4 179 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dqcom,lcc-ipq806x.h9 #define PLL4 0 macro
H A Dqcom,lcc-msm8960.h9 #define PLL4 0 macro
H A Dstm32mp13-clks.h22 #define PLL4 9 macro
H A Dstm32mp1-clks.h186 #define PLL4 179 macro
/linux-master/drivers/clk/qcom/
H A Dlcc-ipq806x.c401 [PLL4] = &pll4.clkr,
450 /* Configure the rate of PLL4 if the bootloader hasn't already */
454 /* Enable PLL4 source on the LPASS Primary PLL Mux */
H A Dlcc-msm8960.c397 [PLL4] = &pll4.clkr,
470 /* Use the correct frequency plan depending on speed of PLL4 */
481 /* Enable PLL4 source on the LPASS Primary PLL Mux */
/linux-master/drivers/net/wireless/ath/ath9k/
H A Dreg.h1377 #define PLL4 0x1618c macro
H A Dhw.c744 while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0) {
749 ath_err(common, "PLL4 measurement not done\n");
/linux-master/drivers/clk/stm32/
H A Dclk-stm32mp1.c1780 PLL(PLL4, "pll4", ref4_parents, 0, RCC_PLL4CR, RCC_RCK4SELR),

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