Searched refs:IPR (Results 1 - 9 of 9) sorted by relevance

/linux-master/arch/arm/mach-pxa/
H A Dirq.c36 #define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \ macro
129 __raw_writel(hw | IPR_VALID, pxa_irq_base + IPR(hw));
195 saved_ipr[i] = __raw_readl(pxa_irq_base + IPR(i));
214 __raw_writel(saved_ipr[i], pxa_irq_base + IPR(i));
/linux-master/sound/pci/emu10k1/
H A Dirq.c19 while ((status = inl(emu->port + IPR)) != 0) {
158 outl(orig_status, emu->port + IPR); /* ack all */
H A Demu10k1x.c59 #define IPR 0x08 /* Global interrupt pending register */ macro
759 status = inl(chip->port + IPR);
795 outl(status, chip->port + IPR);
H A Demupcm.c799 outl(epcm->capture_ipr, emu->port + IPR);
833 outl(epcm->capture_ipr, emu->port + IPR);
/linux-master/drivers/irqchip/
H A Dirq-xilinx-intc.c24 #define IPR 0x04 /* Interrupt Pending Register */ macro
/linux-master/arch/m68k/include/asm/
H A DMC68VZ328.h321 #define IPR LONG_REF(IPR_ADDR) macro
H A DMC68328.h394 #define IPR LONG_REF(IPR_ADDR) macro
H A DMC68EZ328.h312 #define IPR LONG_REF(IPR_ADDR) macro
/linux-master/include/sound/
H A Demu10k1.h88 #define IPR 0x08 /* Global interrupt pending register */ macro
128 /* or HLIPH. When IPR is written with CL set, */

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