Searched refs:IMX7ULP_CLK_DDR_SEL (Results 1 - 3 of 3) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dimx7ulp-clock.h44 #define IMX7ULP_CLK_DDR_SEL 31 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dimx7ulp-clock.h44 #define IMX7ULP_CLK_DDR_SEL 31 macro
/linux-master/drivers/clk/imx/
H A Dclk-imx7ulp.c108 hws[IMX7ULP_CLK_DDR_SEL] = imx_clk_hw_mux_flags("ddr_sel", base + 0x30, 24, 2, ddr_sels, ARRAY_SIZE(ddr_sels), CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE);

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